Dynamic Voltage Scaling for SRAM Power Management
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Solution Overview
Problem
SRAM circuits face challenges in managing power efficiently, particularly in reducing power consumption while maintaining performance, as increased voltage demands shorten battery life and smaller transistor gate-oxides require higher minimum threshold voltages, complicating dynamic voltage management in memory arrays.
Innovation Solution
A power management system that compares the operating voltage of peripheral and logic circuitry with a minimum threshold voltage for the memory array, outputting the greater voltage for active mode operations to ensure read/write capabilities, and a lower retention voltage for power conservation during less intensive operations, without requiring separate power supplies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operating voltage is increased to achieve higher speeds, then the processing speed is improved, but the power consumption increases and battery life is shortened
Solution Approach 1:
The patent implements dynamic voltage scaling by comparing the operating voltage with a reference voltage and selectively enabling voltage boosting only when the operating voltage exceeds the reference voltage. This allows the system to adaptively adjust voltage levels based on operational requirements, achieving high speed when needed while conserving power during normal operations.
2Adaptability or versatility
If separate power supplies are provided for peripheral circuitry and memory array, then the voltage control flexibility is improved, but the device complexity and pin count increase
Solution Approach 1:
The patent combines the power supply control for peripheral circuitry and memory array into a single integrated approach. By using a shared power supply with voltage comparison and selective boosting logic, the system achieves independent voltage control flexibility while avoiding the complexity of separate power supply circuits and additional pins.
3Use of energy by moving object
If the operating voltage is lowered during less memory intensive operation to conserve power, then the power consumption is reduced, but the minimum threshold voltage requirement for read/write operations cannot be met
Solution Approach 1:
The patent employs feedback control by continuously comparing the operating voltage with a reference voltage that represents the minimum threshold voltage requirement. When the operating voltage drops below the reference voltage during low-power operation, the comparison logic triggers voltage boosting to ensure the minimum threshold is met, thereby maintaining read/write operation reliability while allowing power savings during adequate voltage conditions.
Data Source
AI summary
One embodiment of the present invention includes a system for managing power of a memory array. The system comprises a comparator configured to compare a first voltage with a reference voltage. The first voltage can correspond to an operating voltage of at least one of a peripheral circuit associated with the memory array and a logic circuit configured to communicate with the peripheral circuit. The reference voltage can correspond to a minimum threshold voltage for read/write operations of the memory array. The system also comprises an output circuit configured to provide an output voltage to the memory array in response to an output of the comparator. The output voltage can be the greater of the operating voltage of the at least one of the peripheral circuit and the logic circuit and the minimum threshold voltage.