SRAM Feedback Loop for Critical Path Delay Measurement
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Solution Overview
Problem
The challenge in determining critical path time delays in devices with SRAM elements is the inefficiency of existing methods for establishing oscillation loops, which hinders accurate measurement of critical path time delays.
Innovation Solution
An apparatus is provided that forms an oscillation loop using a static random access memory (SRAM) element with a feedback path to generate oscillation signals, allowing for the measurement of critical path delay time by adjusting the feedback clock and address signals to create an oscillation loop, and using a programmable delay element to determine the critical path delay time based on oscillation frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an oscillation loop is established to determine critical path time delay, then measurement capability is provided, but measurement precision is hindered due to inefficiency in establishing the oscillation loop
Solution Approach 1:
The apparatus pre-configures the oscillation loop structure with dedicated feedback path circuitry and control logic that automatically establishes the measurement loop when activated. The feedback path is pre-wired to connect the output of logic cells back to the SRAM element inputs, eliminating the need for complex runtime loop establishment procedures and enabling immediate measurement capability.
Solution Approach 2:
A dedicated feedback path acts as an intermediary component that bridges the output of the logic cell arrangement back to the inputs of the SRAM element. This intermediary structure enables the formation of a complete oscillation loop without requiring complex external wiring or control sequences, thereby improving both measurement precision and establishment efficiency.
2Measurement precision
If feedback path provides delayed clock signal to trigger SRAM output, then oscillation loop is formed for measurement, but device complexity increases
Solution Approach 1:
The feedback path circuitry is designed to serve multiple functions: it provides the clock signal delay necessary for oscillation loop operation, routes address signals from logic cell outputs back to SRAM inputs, and enables mode switching between normal and oscillation operations. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby limiting the increase in device complexity while maintaining measurement precision.
Solution Approach 2:
The oscillation loop apparatus is self-configuring in that the feedback path automatically routes signals appropriately when in oscillation mode. The control logic detects the oscillation mode and automatically activates the feedback path connections and delay elements without requiring external configuration, thereby reducing the operational complexity despite the presence of additional circuitry.
Data Source
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AI summary
An apparatus comprising: a SRAM element comprising a clock input, an address input, an SRAM output, and a first and second address space, wherein a clock signal causes the SRAM element to output the logic value stored in a designated address space; a logic arrangement coupled to the SRAM output; and a feedback path configured to receive an output of the logic arrangement and provide a feedback clock and address signal; and in an oscillation mode, a one is stored in the first address space and a zero in the second address space, and the feedback path provides the output of the logic cell arrangement to the address input and the feedback clock signal to trigger the output of the logic value stored in the currently designated address space and thereby the feedback path, the SRAM element and the logic cell arrangement form an oscillation loop.