SRAM Hard Error Detection Using Error Status Buffer

The patent segments the error handling process into distinct phases: initial error detection using parity/ECC, followed by error classification (soft vs. hard), and then appropriate correction actions. The error status buffer segments the storage of error information, maintaining separate entries for different error types and their correction histories. This segmentation enables precise differentiation between soft and hard errors without conflating their distinct characteristics.

The patent introduces an intermediary classification mechanism between error detection and correction. The error status buffer acts as an intermediary structure that stores detailed error information, including correction attempt counts and error type classifications. This intermediary layer prevents direct, potentially harmful correction of hard errors by first classifying the error type through multiple read attempts and comparison operations.

The patent performs preliminary classification actions before attempting correction. By conducting multiple read attempts and comparing results against the original written data, the system preliminarily determines whether an error is soft or hard before committing to a correction strategy. This preliminary action prevents futile and potentially harmful continuous re-writing of hard errors by identifying them early through the classification process.

The patent implements feedback mechanisms where the results of read operations are fed back to update the error status buffer. Each read attempt provides feedback about the error state, allowing the system to track correction attempts and adjust its strategy. When feedback indicates persistent errors despite multiple correction attempts, the system transitions from active correction to alternative handling, preventing deleterious effects of continuous re-writing.

The patent implements dynamic error handling where the treatment of faulty cells changes based on their error classification and correction history. Rather than statically allocating redundant resources for all potential failures, the system dynamically adjusts its approach: soft errors are corrected in-place, hard errors are detected and marked, and only when necessary are replacement operations performed. This dynamic approach minimizes the need for permanent redundant allocations while maintaining correction capability.

The patent changes the parameter of error handling from static redundancy allocation to dynamic classification-based management. By introducing parameters such as error type classification (soft/hard), correction attempt counts, and error status flags, the system adapts its correction strategy based on these parameters rather than relying on fixed redundant structures. This parameter-driven approach reduces the area overhead associated with traditional redundancy schemes.

The patent enables the memory system to self-diagnose and self-correct errors without requiring external intervention or system restart. The error status buffer and classification logic allow the system to automatically identify hard errors, mark affected cells, and redirect future accesses to valid data locations. This self-service capability eliminates the need for flushing and restarting the processing device, maintaining continuous operation and preventing work loss.

The patent performs preliminary error classification and marking actions before they would necessitate system restart. By detecting and classifying hard errors during normal operation and proactively managing them through the error status buffer, the system prevents error accumulation that would otherwise require system flush and restart. This preliminary management maintains system continuity and avoids time loss.

The patent transitions from static error detection (MBIST during manufacturing) to dynamic error detection that adapts to runtime conditions. The error status buffer and classification mechanism continuously monitor memory operations under actual operating conditions, including varying temperatures, voltages, and workloads. This dynamic approach detects errors that manifest only under specific runtime environmental conditions, which static MBIST cannot identify.

While MBIST performs preliminary error detection during manufacturing, the patent adds a layer of preliminary runtime detection through the error status buffer. This buffer maintains error information from both manufacturing testing and operational use, allowing the system to identify patterns and conditions that trigger hard errors. The preliminary classification and tracking established during manufacturing is extended and adapted to runtime conditions, enabling detection of environment-specific failures.