SRAM Initialization Circuit for NBTI Mitigation
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Solution Overview
Problem
SRAM memory cells face degradation due to NBTI, affecting their suitability for use in Physical Unclonable Functions (PUFs) and leading to data security issues like the 'data imprint' effect, where previously stored data can be revealed through techniques like CPA and DPA, due to threshold voltage drift over time.
Innovation Solution
A memory device with a deterministic initialization circuit that uses a random value drawing stage to generate logical states for SRAM memory cells, ensuring that each column initializes to a randomly determined state, thereby counteracting the NBTI effect and enhancing data security by making the initialization values unpredictable and variable over time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic inversion of memory cell contents is performed to counteract NBTI degradation, then the reliability of SRAM cells for PUF applications is improved, but power consumption increases and access time to memory cells is reduced
Solution Approach 1:
The patent applies preliminary action by initializing memory cells to random states before they are used for PUF operations. The initialization circuit sets each memory cell to a deterministic random state based on its physical characteristics, preventing NBTI-induced drift from compromising PUF reliability. This preliminary initialization avoids the need for periodic inversion operations, thereby reducing power consumption while maintaining cell stability.
2Reliability
If periodic inversion of memory cell contents is performed to counteract NBTI degradation, then the reliability of SRAM cells for PUF applications is improved, but the time during which the system can access memory cells is reduced
Solution Approach 1:
The initialization circuit performs preliminary random state assignment to memory cells before PUF operations begin. By pre-establishing deterministic random states that are resistant to NBTI degradation, the system eliminates the need for periodic inversion operations during PUF operation, thereby maintaining continuous access to memory cells without time loss.
3Reliability
If additional transistors are added to the cell structure to implement bit inversion, then the ability to counteract NBTI is improved, but the device complexity increases
Solution Approach 1:
The patent extracts the NBTI mitigation function from the memory cell structure itself and implements it separately through a dedicated initialization circuit. Instead of modifying each memory cell with additional transistors for inversion capability, the initialization circuit independently sets each cell to a NBTI-resistant random state, thereby maintaining simple cell structures while achieving reliability improvement.
4Duration of action of stationary object
If data remains stored in memory for a long time, then the data imprint effect occurs making previously stored data retrievable, but keeping data stored is necessary for normal operation
Solution Approach 1:
The patent applies preliminary anti-action by initializing memory cells to random states that are inherently resistant to data imprint effects. The initialization circuit creates deterministic random states based on physical characteristics, which prevents the threshold voltage drift caused by prolonged data storage from revealing previous data. This preliminary randomization counteracts the data imprint effect before it can occur during normal operation.
Data Source
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AI summary
A static random access memory device comprising a matrix in which each column is associated with an initialization circuit (100i, 100j), provided with a stage (110) for drawing random value (110) configured to, following the reception of the initialization activation signal (RAND_ENABLE), randomly produce respectively a first potential at a first node (NA) corresponding to a given logic state and a second potential at a second output node (NB) different from the first potential and corresponding to a given logic state complementary to said given logic state, in order to initialize cells of the same column to a given state and randomly selected between two states.