Direct-Bonded SRAM Interconnect Layout With Fewer Metal Layers
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving compact and efficient interconnect structures that optimize performance and reduce power consumption, particularly in static random access memory (SRAM) applications.
Innovation Solution
The formation of a simplified interconnect structure with a minimum number of metallization layers and conductive patterns, eliminating redundant elements, and direct bonding of functional blocks to enhance performance and reduce power requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional interconnect structure with multiple metallization layers is used, then connectivity and signal routing are achieved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts and eliminates redundant metallization layers and conductive patterns from the interconnect structure, retaining only the minimum necessary elements for functional connectivity. This reduction directly decreases device complexity and reduces the materials and processes required, thereby lowering power consumption.
Solution Approach 2:
The patent segments the interconnect structure into essential functional components only, separating necessary conductive elements from redundant ones. This segmentation allows for optimized routing that maintains connectivity while reducing overall structure complexity and associated power consumption.
2Productivity
If functional blocks are directly bonded, then device compactness and operational efficiency are improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary alignment and preparation of bonding surfaces before the actual bonding process. Functional blocks are pre-positioned and oriented correctly, ensuring that when bonding occurs, the precision requirements are met through advance preparation rather than relying solely on the bonding process itself.
3Use of energy by stationary object
If redundant conductive patterns are eliminated, then power consumption is reduced and device compactness is achieved, but interconnect functionality may be compromised
Solution Approach 1:
The patent carefully extracts only the redundant conductive patterns while preserving all essential connectivity paths. Each conductive element is evaluated for its functional necessity, ensuring that elimination of redundant elements does not compromise interconnect functionality or reliability.
Solution Approach 2:
The patent applies different levels of conductive pattern density to different regions of the device. Essential functional areas maintain full connectivity with all necessary conductive patterns, while non-critical areas use reduced patterns. This local differentiation optimizes power consumption without sacrificing reliability in critical regions.
Data Source
AI summary
A semiconductor device includes a first functional block and a second functional block. The first functional block includes a first substrate, a first device layer, a first interconnect structure and a plurality of first bonding patterns, and the first interconnect structure includes a plurality of first conductive patterns. The first bonding patterns are irregularly arranged. The second functional block is bonded to the first functional block. The second functional block includes a second substrate, a second device layer, a second interconnect structure and a plurality of second bonding patterns, and the second bonding patterns are in direct contact with the first bonding patterns.