SRAM Memory ECC Testing via Data Inversion
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Solution Overview
Problem
Conventional memory testing methods for SRAM in safety applications are time-consuming and inefficient, as they require copying user data to another memory and cannot simulate critical conditions effectively during active operation, especially due to slow bus access and the inability to detect hard stuck-at errors.
Innovation Solution
A method involving error correction code checks (ECC checks) on user data and its inverted versions, allowing for the detection of hard and soft errors without data copying, using a combination of a memory built-in self-test controller (MBIST) and an error correction code unit, which inverts and restores user data within the memory, enabling fast and non-destructive testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory testing methods are used with data copying via bus, then memory can be tested, but testing time becomes substantial and performance is reduced
Solution Approach 1:
The patent uses copying of test patterns into the memory device under test, but instead of copying actual user data back and forth via bus, it copies simplified test patterns that can be directly processed by the memory's built-in test logic, eliminating the time-consuming data transfer step
Solution Approach 2:
The memory device performs self-testing using its own built-in test logic and pattern generation capabilities, without requiring external CPU intervention or data copying via bus. The memory tests itself by internally generating test patterns and detecting errors
2Reliability
If CPU accesses memory via slow bus for testing, then memory can be tested, but critical conditions cannot be simulated effectively during active operation
Solution Approach 1:
The testing function is segmented from the main application logic and implemented as a separate built-in test mode within the memory device. This allows the memory to be tested independently without affecting application performance, and the test can be activated when no application processing is occurring
Solution Approach 2:
Test patterns are prepared and loaded into the memory device in advance during manufacturing or initialization, so that when testing is needed, the memory can immediately begin testing without requiring external data preparation or bus transfers
3Reliability
If conventional testing algorithms are used, then memory can be tested, but hard stuck-at errors cannot be detected
Solution Approach 1:
The patent inverts the traditional testing approach by using inverted test patterns and inverted data representations. By testing with inverted patterns and comparing against inverted expected values, the method can detect stuck-at errors that would mask themselves in conventional testing approaches
Data Source
AI summary
A method for testing a memory includes performing an error correction code check (ECC check) on user data stored in the memory, inverting the user data stored in the memory, performing a further ECC check on the inverted user data stored in the memory, and inverting the inverted user data stored in the memory for restoring the user data in the memory.