SRAM Cell Layout With Oblique Metal Connection for Higher Density

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity and reduced geometric size of integrated circuits have made it challenging to improve the density and reduce the cell size of Static Random Access Memory (SRAM) cells while maintaining efficient read and write speeds.

Innovation Solution

The implementation of oblique connections in the form of two-dimensional metal electrodes within the lowest metal layer of SRAM cells, utilizing double-patterning or multi-patterning processes, to enhance pitch and reduce cell height, thereby increasing SRAM density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional SRAM cell structures are used, then manufacturing process is simpler, but SRAM density is lower and cell size is larger

Engineering Contradiction:
ImproveSRAM densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent introduces oblique connections that extend diagonally across multiple metal layers, transforming the traditional planar connection approach into a three-dimensional spatial arrangement. This dimensional change allows pitch enhancement and cell height reduction simultaneously, achieving higher SRAM density without proportionally increasing manufacturing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the connection path into multiple segments across different metal layers (first metal layer, second metal layer, third metal layer) with intermediate connection structures. This segmentation allows the oblique connection to achieve pitch enhancement through vertical layering while maintaining manufacturability through standardized layer-by-layer fabrication processes

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If cell size is reduced to increase density, then SRAM density improves, but read and write speeds deteriorate

Engineering Contradiction:
ImproveSRAM densityVSAvoidread and write speeds
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

By moving connections into the vertical dimension across multiple metal layers, the patent reduces the horizontal footprint of SRAM cells, enabling higher density. The oblique connection geometry maintains adequate current flow paths despite reduced cell dimensions, preserving read and write speeds while achieving compact cell layouts

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Shape

If oblique connections are implemented, then pitch is enhanced and cell height is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvepitch and cell heightVSAvoidmanufacturing process complexity
Core Design Contradiction:
ShapeVSEase of manufacture

Solution Approach 1:

The oblique connection is segmented into discrete portions formed in different metal layers with standardized patterning processes. Each layer uses conventional photolithography and etching steps, making the complex three-dimensional structure manufacturable through repeated application of standard fabrication techniques rather than requiring novel complex processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent establishes the oblique connection geometry through preliminary patterning in lower metal layers before completing upper layer interconnects. This preliminary action defines the pitch-enhanced footprint early in the fabrication sequence, allowing subsequent layers to be formed using standard alignment and patterning processes

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260068117A1Memory structure and manufacturing method thereof
Publication Date: 2026.03.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260068117A1 patent drawing
  • US20260068117A1 patent drawing
  • US20260068117A1 patent drawing

AI summary

A memory structure is provided. The memory structure includes a first pull-up transistor in a first active region, a second pull-up transistor in a second active region parallel to and separated from the first active region, and an electrode overlapping the first and second active regions and configured to electrically connect a gate structure of the second pull-up transistor to a drain region of the first pull-up transistor. The electrode is formed in a metal layer closest to the first and second active regions.