Synchronous DRAM Output Buffer Power Management

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Solution Overview

Problem

Synchronous DRAM semiconductor devices consume high power during data output due to the continuous input and output of data, which is not efficiently managed by existing technologies.

Innovation Solution

The implementation of multiple output buffers, a strobe control unit, and strobe buffers that activate selectively based on externally input signals, with optional components like an expanded mode register set, fuse unit, frequency detecting unit, and masking control unit to optimize power usage by activating only necessary buffers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple output buffers continuously input and output data, then data communication capability is improved, but power consumption increases

Engineering Contradiction:

Improvedata communication capabilityVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic control of output buffers by activating or deactivating specific buffers based on write operation status. The first output buffer is deactivated when a write operation is detected, while the second output buffer remains active, creating a dynamic power management system that adapts to operational conditions.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent divides the output buffer system into multiple independent buffers (first output buffer, second output buffer) that can be selectively activated or deactivated. This segmentation allows individual buffers to be controlled based on specific operational requirements, enabling granular power management.

Inventive Principle:

Principle #1Segmentation

2Productivity

If all output buffers are activated to maximize data output, then data throughput is improved, but power consumption increases

Engineering Contradiction:

Improvedata throughputVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent applies partial action by activating only the necessary output buffer(s) based on operational mode rather than keeping all buffers active. During read operations, only the required buffer is activated, avoiding the excessive power consumption that would result from all buffers being active simultaneously.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the operational state parameter of output buffers dynamically based on detected operation types. The activation status of each buffer is changed as a parameter response to write or read operation detection, optimizing power consumption while maintaining data throughput requirements.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8325544B2Synchronous dynamic random access memory semiconductor device for controlling output data

Publication Date: 2012.12.04 SAMSUNG ELECTRONICS CO LTD

AI summary

Provided is a synchronous dynamic random access memory (DRAM) semiconductor device including multiple output buffers, a strobe control unit and multiple strobe buffers. Each of the output buffers is configured to output one bit of data. The strobe control unit is configured to output multiple strobe control signals in response to an externally input signal. The strobe buffers are connected to the output buffers and the strobe control unit, and each of the strobe buffers is configured to output at least one strobe signal. At least some of the strobe buffers are activated in response to the strobe control signals, and the output buffers are activated in response to the strobe signals output by the activated strobe buffers.