SRAM Bit Line Pre-Charge Timing Under BTI Aging
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Solution Overview
Problem
Self-timing static random access memory (SRAM) designs face timing window degradation due to aging effects like bias temperature instability (BTI), leading to incorrect functionality.
Innovation Solution
Implementing a semiconductor device with a clock generator, buffer circuit, and bit line pre-charger that includes specific switch configurations to mitigate BTI effects by optimizing the bit line pre-charge timing windows, ensuring proper pre-charge and operation of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If self-timing SRAM uses critical path delay to form timing windows for memory operations, then the timing windows are initially established correctly, but the timing windows degrade over time due to aging effects like BTI
Solution Approach 1:
The patent applies preliminary action by pre-charging the bit lines before memory read operations. The bit line pre-charger circuit actively charges the bit lines to a predetermined voltage level in advance, ensuring that the timing window for bit line pre-charge is maintained despite BTI effects. This preliminary charging action compensates for the degradation caused by aging, allowing the memory device to maintain correct functionality over time.
2Reliability
If the bit line pre-charge timing window is optimized to mitigate BTI effects, then pre-charge effectiveness is improved, but the device complexity increases due to additional circuits
Solution Approach 1:
The patent introduces an intermediary bit line pre-charger circuit that mediates between the clock signals and the bit lines. This pre-charger circuit includes switching elements controlled by clock signals to selectively connect charge pump circuits to the bit lines. The intermediary pre-charger isolates the main memory cell array from the complex charging control logic, improving pre-charge effectiveness while managing device complexity through modular design.
Data Source
AI summary
A semiconductor device includes a bit line pre-charger and a buffer circuit. The bit line pre-charger is configured to charge at least one bit line when a first control signal has a first voltage level. The buffer circuit is configured to generate the first control signal. During a first standby period, the buffer circuit adjusts the first control signal to a second voltage level different from the first voltage level.