SRAM Program Transfer via Threshold Voltage Control

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Solution Overview

Problem

Semiconductor devices with rewritable nonvolatile memory face challenges in reducing power consumption while maintaining reliability, as DC leakage current through flash memory hinders low power operation and soft errors can alter program data in RAM.

Innovation Solution

A semiconductor device comprising a ROM, a SRAM on a thin film BOX-SOI substrate, a substrate bias circuit, and oscillation circuits that transfer programs from ROM to SRAM, controlling threshold voltages and frequencies to minimize power consumption and error risk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the program is transferred to the RAM, then the electric power consumption is reduced, but the reliability is sacrificed due to soft errors and noise causing bit inversion

Engineering Contradiction:
Improveelectric power consumptionVSAvoidprogram data integrity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by transferring the program from ROM to RAM before the low power mode is activated. The program is copied to RAM during the reset period when the system is still powered, ensuring that the program is available in RAM before power consumption needs to be reduced. This allows the system to enter low power mode with the program already in RAM, avoiding the need to keep ROM powered during operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the copying principle by creating a duplicate of the program data from ROM to RAM. The program is copied during the reset period, and then the copied version in RAM is used for execution during low power modes. This copying allows the system to discard the original ROM data and use the RAM copy, significantly reducing power consumption while maintaining program availability.

Inventive Principle:
Principle #26Copying

2Reliability

If the program is executed directly from the ROM at low speed operation, then the reliability is maintained, but the electric power consumption cannot be reduced due to DC leakage current

Engineering Contradiction:
Improveprogram execution reliabilityVSAvoidelectric power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by transferring the program from ROM to RAM during the reset period before the low power mode is activated. The program is copied to RAM when the system is still powered, ensuring that the program is available in RAM before power consumption needs to be reduced. This allows the system to enter low power mode with the program already in RAM, avoiding the need to keep ROM powered during operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the copying principle by creating a duplicate of the program data from ROM to RAM. The program is copied during the reset period, and then the copied version in RAM is used for execution during low power modes. This copying allows the system to discard the original ROM data and use the RAM copy, significantly reducing power consumption while maintaining program availability.

Inventive Principle:
Principle #26Copying

3Use of energy by moving object

If the program transfer is performed during power-on reset, then the electric power consumption is reduced, but the program may be executed as garbled bits due to soft errors and noise

Engineering Contradiction:
Improveelectric power consumptionVSAvoidprogram execution accuracy
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by transferring the program from ROM to RAM during the reset period before the low power mode is activated. The program is copied to RAM when the system is still powered, ensuring that the program is available in RAM before power consumption needs to be reduced. This allows the system to enter low power mode with the program already in RAM, avoiding the need to keep ROM powered during operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the copying principle by creating a duplicate of the program data from ROM to RAM. The program is copied during the reset period, and then the copied version in RAM is used for execution during low power modes. This copying allows the system to discard the original ROM data and use the RAM copy, significantly reducing power consumption while maintaining program availability.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces electric power consumption while maintaining reliability by minimizing DC leakage current and mitigating soft errors through controlled voltage and frequency management during program transfer and execution.

Implementation Method 1

a substrate bias circuit for controlling a substrate bias voltage of the SRAM... lowering a threshold voltage of the SRAM by using the substrate bias circuit... heightening the threshold voltage of the SRAM by using the substrate bias circuit

Methodology Applied
Scientific EffectThreshold voltage control through substrate bias:

Implementation Method 2

a first oscillation circuit for generating a signal of a first frequency, a second oscillation circuit for generating a signal of a second frequency lower than the first frequency

Methodology Applied
Scientific EffectElectrical oscillation:

Data Source

PatentUS11392192B2Semiconductor device from transferring programs from a ROM to an SRAM
Publication Date: 2022.07.19 RENESAS ELECTRONICS CORP
  • US11392192B2 patent drawing
  • US11392192B2 patent drawing
  • US11392192B2 patent drawing

AI summary

A semiconductor device capable of reducing electric power consumption while suppressing deterioration in reliability is provided. The semiconductor device includes a flash memory, a SRAM formed on a SOI substrate, oscillation circuits generating a signal of a first frequency and a signal of a second frequency lower than the first frequency, and a processor operating in synchronization with a system clock. The processor performs steps of turning on a power supply of the flash memory, lowering a threshold voltage of the SRAM, transferring a program from the flash memory to the SRAM by using the signal of the first frequency as the system clock, turning off the power supply of the flash memory, heightening the threshold voltage of the SRAM, and executing the program stored in the SRAM by using the signal of the second frequency as the system clock.