SRAM PUF De-Biasing Circuit for Sense Amplifier Offset

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Physically Unclonable Functions (PUFs) based on SRAM cells face significant bias issues due to sense amplifier offsets, which can reduce the inter-Hamming distance and compromise the uniqueness and reliability of the generated bit vectors, especially as technology scales and process variations increase.

Innovation Solution

The implementation of de-biasing techniques using logical XOR or XNOR operations on multiple bits shared by the same sense amplifier, coupled with a de-biasing circuit that includes an XOR gate and a latch, to reduce bias and ensure balanced output bit distributions, thereby maintaining the uniqueness and reliability of the PUF signature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sense amplifiers are used to read SRAM cells in PUF, then the output bits can be generated, but sensing bias is introduced that reduces inter-Hamming distance and compromises uniqueness

Engineering Contradiction:

ImprovePUF output reliabilityVSAvoidbit distribution balance

Core Design Contradiction:

ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces an intermediary de-biasing circuit that processes the biased output from the sense amplifier. This circuit includes XOR gates and latches that combine multiple sense amplifier outputs to cancel out the systematic bias, producing balanced PUF bits without requiring changes to the sense amplifier itself.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter of bit combination by using multiple sense amplifier outputs and combining them through XOR operations. This transforms the biased individual bit outputs into unbiased composite outputs, effectively changing the distribution parameter of the PUF bits.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If de-biasing circuits are added to reduce sense amplifier bias, then bit distribution balance improves, but device complexity increases

Engineering Contradiction:

Improvebit distribution balanceVSAvoidcircuit complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The de-biasing circuit is segmented into modular units, each handling a specific group of PUF bits. This segmentation allows the bias correction function to be distributed across multiple independent modules, reducing the complexity burden on any single part of the circuit while maintaining overall effectiveness.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10880101B2Method and circuit for de-biasing PUF bits

Publication Date: 2020.12.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A device includes an array including a plurality of bit generating cells arranged in a plurality of rows and columns and a PUF generator. The PUF generator includes a plurality of column multiplexers, each column multiplexer coupled to a plurality of the columns from the array; a plurality of sense amplifiers, each sense amplifier being associated with a respective one of the column multiplexers; and a plurality of de-biasing circuits, each de-biasing circuit associated with a respective column multiplexer and coupled to an output of a respective one of the sense amplifiers. Each de-biasing circuit is operable to provide an output for generating a PUF signature that is dependent on more than one sensed bit from the bit generating cells associated with the columns coupled to the de-biasing circuit's respective column multiplexer, whereby a sensing bias of the sense amplifier to which the de-biasing circuit is coupled is reduced.