SRAM PUF Authentication via Majority State Election

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Solution Overview

Problem

Existing methods for generating a physically unclonable function (PUF) signature in SRAM devices face challenges due to the need to filter out unstable bits, which can lead to issues like real estate concerns and increased power consumption, while maintaining reliability and repeatability.

Innovation Solution

The use of an election engine and a start-up circuit to determine the majority initial state of each bit in SRAM devices, allowing for the generation of a PUF signature without compromising reliability, by iteratively powering on and off the SRAM blocks and fully discharging parasitic capacitors to ensure consistent initial states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If filtering methods are used to remove unstable bits from SRAM, then reliability of PUF signature is improved, but device area and power consumption increase

Engineering Contradiction:
ImprovePUF signature reliabilityVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts only the necessary stable bits from the SRAM array for PUF signature generation, rather than using all bits or requiring extensive filtering infrastructure. By selecting a subset of inherently stable bits through the start-up circuit behavior, the solution achieves reliable PUF signatures without dedicating large areas to filtering logic or redundant bit structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The start-up circuit naturally exhibits varying initial states that automatically reveal stable bits without requiring external filtering mechanisms. The circuit's own power-on behavior serves as the selection mechanism, eliminating the need for separate filtering hardware and reducing overall device area while maintaining reliability.

Inventive Principle:
Principle #25Self-service

2Reliability

If filtering methods are used to remove unstable bits from SRAM, then reliability of PUF signature is improved, but power consumption increases

Engineering Contradiction:
ImprovePUF signature reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The start-up circuit's natural power-on behavior automatically differentiates stable from unstable bits without requiring active filtering operations. This self-service mechanism eliminates the need for additional power-consuming filtering logic while reliably identifying stable bits for PUF signature generation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent performs bit stability assessment during the initial power-on sequence before normal operation begins. By determining which bits are stable during start-up, the system prepares the PUF signature data without requiring continuous power-consuming filtering operations during active use, thereby reducing overall power consumption.

Inventive Principle:
Principle #10Preliminary action

3Use of energy by stationary object

If parasitic capacitors are not fully discharged, then power consumption is reduced, but initial state consistency deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidinitial state consistency
Core Design Contradiction:
Use of energy by stationary objectVSStability of the object's composition

Solution Approach 1:

The patent applies discharge action only to the extent necessary to achieve consistent initial states without over-discharging. By controlling the discharge process to remove just enough charge from parasitic capacitors to ensure reproducibility, the system avoids excessive power consumption while maintaining the required level of initial state consistency for reliable PUF operation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11012246B2SRAM-based authentication circuit
Publication Date: 2021.05.18 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11012246B2 patent drawing
  • US11012246B2 patent drawing
  • US11012246B2 patent drawing

AI summary

A memory device includes a memory block comprises a plurality of bits, wherein at least a first bit of the plurality of bits presents an initial logic state each time it is powered on; a start-up circuit configured to power on and off the memory block N times, where N is an odd integer greater than 1, and wherein the at least first bit presents an initial state after each respective power cycle of the memory block; and an authentication circuit, coupled to the memory block, and comprising an election engine that is configured to elect an initial state that occurs (N+1)/2 or more times after N power cycles that are performed by the start-up circuit, as a majority initial logic state for the first bit.