SRAM PUF Device PRNG Challenge Response Extension
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Solution Overview
Problem
Existing PUF devices are limited by their unbalanced challenge/response process, requiring numerous single-bit inputs to generate a single-bit response, which restricts their application and efficiency.
Innovation Solution
An SRAM-based PUF device is enhanced by using a pseudo random number generator (PRNG) with a linear feedback shift register (LFSR) to generate multiple challenge/response pairs, allowing a single input to produce multiple output bits, and fuse devices for synchronization and operation paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a traditional PUF device uses a one-to-one challenge/response mapping, then the device structure is simple, but the productivity and functionality are limited due to requiring numerous single-bit inputs to generate a single-bit response
Solution Approach 1:
The challenge address is segmented into two independent parts: a first part that selects a row and a second part that selects a column. This segmentation allows the PUF device to generate multiple challenge/response pairs by independently varying these segments, thereby increasing productivity without proportionally increasing device complexity
Solution Approach 2:
The PUF device is designed to serve multiple functions: it can generate not only single-bit responses but also multi-bit responses by combining multiple challenge/response pairs. The same physical structure supports both traditional one-to-one mapping and the new many-to-one mapping, achieving multi-functionality without requiring separate dedicated structures
2Productivity
If the PUF device generates multiple output bits from a single input, then the efficiency increases, but the complexity of generating and managing multiple challenge/response pairs increases
Solution Approach 1:
The device pre-organizes the memory array into a structured grid with rows and columns, and pre-establishes the mapping relationships between address segments and memory locations. This preliminary structuring enables efficient generation of multiple challenge/response pairs without requiring complex runtime management logic
Solution Approach 2:
The column address segment acts as an intermediary that, when combined with the row address segment, uniquely identifies memory locations. This intermediary mechanism allows the system to systematically generate multiple challenge/response pairs by varying the column segment while keeping the row segment fixed, simplifying the management of multiple pairs
Data Source
AI summary
A physically unclonable function (PUF) device comprises a memory block including an array of cells, and a pseudo random number generator (PRNG) configured to generate a number of addresses to challenge the memory block in response to an element selected out of a combination.


