SRAM PUF Authentication Circuit Using Stable Bit Extraction
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Solution Overview
Problem
Conventional power-on SRAM-based PUFs require a large number of bits to generate a signature, leading to issues such as increased real estate and power consumption, as well as the need for a memory/database to record initial power-on states, which becomes impractical with larger SRAM devices.
Innovation Solution
A monitoring engine dynamically identifies stable and unstable bits in an SRAM block by applying different voltage patterns and detecting state transitions, allowing the PUF controller to generate a signature using only the stable bits, thereby reducing the number of bits required and improving efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power-on SRAM-based PUFs use a large number of bits to generate a signature, then the reliability and uniqueness of the PUF signature is improved, but the real estate area and power consumption increase significantly
Solution Approach 1:
The patent extracts and identifies only the stable bits from the SRAM block that maintain consistent state transitions, excluding unstable bits from signature generation. This selective extraction reduces the number of bits needed while maintaining PUF reliability, directly resolving the contradiction between signature reliability and area consumption.
2Reliability
If conventional power-on SRAM-based PUFs use a large number of bits to generate a signature, then the uniqueness of the PUF signature is improved, but the power consumption increases
Solution Approach 1:
The monitoring engine extracts only the stable bits that contribute to unique signature generation, eliminating the need to power and process unstable bits. This reduces power consumption while maintaining signature uniqueness by focusing computational resources only on bits that provide reliable differentiation.
Solution Approach 2:
Instead of using all SRAM bits for signature generation, the patent applies partial action by using only the necessary stable bits. This reduces power consumption by avoiding unnecessary switching and processing of excess bits that do not contribute to signature uniqueness.
3Reliability
If conventional power-on SRAM-based PUFs record initial power-on states for all bits, then the completeness of PUF data is improved, but the storage requirements become impractical for larger SRAM devices
Solution Approach 1:
The monitoring engine extracts and identifies only stable bits through state transition detection, and the system records data only for these stable bits. This extraction approach maintains PUF data completeness for signature generation while dramatically reducing storage requirements by excluding unstable bits that would occupy space without contributing to reliability.
4Adaptability or versatility
If the PUF signature is dynamically updated as SRAM bits change over time, then the adaptability of the authentication system is improved, but the complexity of the authentication circuit increases
Solution Approach 1:
The monitoring engine performs preliminary identification of stable bits during an initialization phase, storing this information for future use. This preliminary action enables dynamic signature updates without requiring complex real-time analysis, as the stable bit identification is pre-established and can be reused across multiple authentication operations.
Data Source
AI summary
An authentication circuit coupled to a plurality of memory bits includes a first circuit configured to provide a first data pattern to all the bits thereby causing each bit to be in a first data state, detect whether a transition from the first data state to a second data state occurs for each bit in response to a first reducing voltage applied to the plurality of bits, provide a second data pattern to all the bits thereby causing each bit to be in the second data state, and detect whether a transition from the second data state to the first data state occurs for each bit in response to a second reducing voltage applied to the plurality of bits, wherein the first data state is different from the second data state, and a second circuit configured to generate a PUF signature based on the transitions of each bit.