SRAM Supply Voltage Circuit Using Replica Latches for Low-Power Retention

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Solution Overview

Problem

SRAMs face challenges in reducing power consumption during low power modes due to variations in threshold voltages of FETs caused by temperature, age, and process variations, leading to higher power consumption than necessary.

Innovation Solution

A voltage generation circuit that includes two reference generation circuits, each with a replica SRAM latch, compares the threshold voltages of PFETs and NFETs to determine the higher voltage, providing a supply voltage that is sufficient for data retention while minimizing power consumption by adjusting based on these variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the supply voltage is reduced to minimize power consumption during low power mode, then power consumption is reduced, but data retention reliability deteriorates due to threshold voltage variations

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The voltage generation circuit dynamically adjusts the supply voltage level based on real-time threshold voltage measurements from replica circuits. Instead of using a fixed voltage level, the system continuously monitors threshold voltage variations and adapts the supply voltage accordingly, enabling optimal power consumption while maintaining data retention reliability under varying operating conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback mechanisms where threshold voltage measurements from replica PFET and NFET circuits are fed back to the voltage generation circuit. This feedback loop enables the voltage generation circuit to compare measured threshold voltages and adjust the supply voltage level to ensure it remains above the higher threshold voltage, thereby maintaining reliability while minimizing power consumption.

Inventive Principle:
Principle #23Feedback

2Device complexity

If a fixed supply voltage is used during low power mode, then circuit simplicity is maintained, but power consumption cannot be optimized due to threshold voltage variations

Engineering Contradiction:
Improvevoltage generation circuit complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The invention uses replica PFET and NFET circuits that copy the threshold voltage characteristics of the actual memory cell transistors. These replica circuits provide threshold voltage measurements without requiring complex sensing mechanisms, enabling simple yet effective adaptive voltage control by measuring and comparing threshold voltages from the replica structures.

Inventive Principle:
Principle #26Copying

3Reliability

If the supply voltage is increased to account for threshold voltage variations, then data retention reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system changes the supply voltage parameter dynamically based on measured threshold voltage conditions. Instead of using a conservative fixed voltage level that guarantees reliability but wastes energy, the system adjusts the voltage parameter to match the actual threshold voltage requirements, minimizing power consumption while maintaining the minimum necessary reliability margin.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4328914A1Voltage generation circuit for SRAM
Publication Date: 2024.02.28 NXP BV
  • EP4328914A1 patent drawingFigure 1
  • EP4328914A1 patent drawingFigure 2
  • EP4328914A1 patent drawingFigure 3

AI summary

A memory includes a supply voltage generation circuit for providing a supply voltage to a plurality of SRAM cells of the memory during at least one mode of memory operation. The supply voltage generation circuit includes a first reference generation circuit that includes at least one SRAM cell with a replica SRAM latch. The first reference generation circuit provides a first voltage during an at least one mode of memory operation. The supply voltage generation circuit includes a second reference generation circuit that includes at least one SRAM cell with a replica SRAM latch. The second reference generation circuit provides a second voltage during the at least one mode of memory operation. The voltage generation circuit includes an output for providing a supply voltage to the plurality of cells during the at least one mode of memory operation.