SRAM Screening With Independent Wordline And Array Voltage Control
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Solution Overview
Problem
Current SRAM memory testing in integrated circuits is inefficient as it applies the same stress voltage to wordline (WL) and array (Vdda), leading to increased failure of good bits and reduced manufacturing yield, especially under temperature and voltage variations.
Innovation Solution
Providing separate voltage supplies for WL and Vdda allows independent stress voltage levels, keeping Vdda within the specified range while allowing WL to be outside, enabling a more effective screening test that reduces the rejection of good bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the same stress voltage is applied to both wordline (WL) and array (Vdda) during SRAM screening, then the testing process is simple, but the manufacturing yield decreases due to increased failure of good bits
Solution Approach 1:
The patent divides the voltage control into two independent parts: one voltage supply for the wordline (WL) and another for the array (Vdda). This segmentation allows each to be controlled independently, enabling the WL to be stressed beyond normal operating conditions while keeping Vdda within specifications, thereby reducing false failures of good bits while still detecting weak bits
Solution Approach 2:
The patent applies different voltage stress conditions to different parts of the SRAM structure locally. The wordline receives higher stress voltage to detect weak bits, while the array operates at normal voltage levels to avoid causing failures in good bits. This localized differential stress approach optimizes detection accuracy while preserving yield
2Measurement precision
If higher stress voltage is applied to improve weak bit detection, then detection effectiveness improves, but good bits may fail increasing rejection rates
Solution Approach 1:
By segmenting the voltage control into independent WL and Vdda supplies, the patent enables applying high stress voltage to WL for detecting weak bits while keeping Vdda at normal operating levels, preventing good bits from failing due to excessive stress
Solution Approach 2:
The patent changes the voltage parameters differently for WL and Vdda during screening. WL voltage is increased beyond normal operating conditions to stress weak bits, while Vdda remains within specifications. This differential parameter change allows effective weak bit detection without compromising good bit reliability
Data Source
AI summary
An integrated circuit containing an SRAM that provides a switch to decouple the SRAM wordline voltage from the SRAM array voltage during screening and that also provides different wordline and array voltages during a portion of the SRAM bit screening test. A method for screening SRAM bits in an SRAM array in which the wordline voltage is different than the array voltage during a portion of the screening test.


