SRAM Synapse Array Using Sub-threshold Leakage Current

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Current neuromorphic systems face challenges in high integration and low power consumption due to increased leakage current from semiconductor components, leading to continuous firings without external stimulation, which is inefficient and power-intensive.

Innovation Solution

A neuromorphic system utilizing a SRAM-based synapse array with bias and cut-off transistors that leverage sub-threshold leakage current to charge membrane nodes and control synaptic weights, combined with a pulse shaper circuit and STDP logic to manage synaptic plasticity, reducing leakage power consumption and enabling efficient data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional neuromorphic circuits are used, then data processing capability is achieved, but leakage current increases causing continuous firings and high power consumption

Engineering Contradiction:

Improveleakage power consumptionVSAvoidcontinuous firings without external stimulation

Core Design Contradiction:

Loss of energyVSReliability

Solution Approach 1:

The patent converts the harmful sub-threshold leakage current into a beneficial charging mechanism for the membrane node. The leakage current that would normally cause continuous unwanted firings is instead harnessed to charge the membrane node in a controlled manner, reducing overall power consumption while maintaining reliable neuron firing behavior only when appropriate.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Productivity

If more synapse circuits are integrated, then data processing capability increases, but leakage current and power consumption increase

Engineering Contradiction:

Improvedata processing capabilityVSAvoidleakage power consumption

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent changes the operating parameters of the synapse circuits by utilizing sub-threshold leakage current operations. This allows the circuits to function at lower current levels, enabling higher integration of synapse circuits without proportionally increasing leakage power consumption, thus improving data processing capability while controlling energy loss.

Inventive Principle:

Principle #35Parameter changes

3Loss of energy

If sub-threshold leakage current is used to charge membrane nodes, then power consumption decreases, but control precision over synaptic weights may be affected

Engineering Contradiction:

Improvepower consumptionVSAvoidsynaptic weight control precision

Core Design Contradiction:

Loss of energyVSManufacturing precision

Solution Approach 1:

The patent introduces a specialized synapse circuit design with specific transistor configurations (including cut-off transistors and bias transistors) that act as intermediaries between the sub-threshold leakage current and the membrane node. This intermediary structure enables precise control of synaptic weights even while operating with low-level leakage current, maintaining control precision while reducing power consumption.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system achieves high integration and low power consumption by minimizing leakage current, maintaining a firing rate similar to biological neurons, and efficiently updating synaptic weights based on spike timing, thus enhancing the neuromorphic system's adaptability and efficiency.

Implementation Method 1

the at least one synapse circuit is configured to charge a membrane node of a neuron circuit connected with the at least one synapse circuit using a sub-threshold leakage current that passed through the at least one bias transistor

Methodology Applied

Scientific EffectSub-threshold leakage current:

Implementation Method 2

The at least one synapse circuit may be configured to change a value of the SRAM using a leakage current that passed through the at least two cut-off transistors

Methodology Applied

Scientific EffectLeakage current control:

Data Source

PatentUS9418333B2Synapse array, pulse shaper circuit and neuromorphic system

Publication Date: 2016.08.16 SAMSUNG ELECTRONICS CO LTD

AI summary

A synapse array based on a static random access memory (SRAM), a pulse shaper circuit, and a neuromorphic system are provided. The synapse array includes a plurality of synapse circuits. At least one synapse circuit among the plurality of synapse circuits includes at least one bias transistor and at least two cut-off transistors, and the at least one synapse circuit is configured to charge a membrane node of a neuron circuit connected with the at least one synapse circuit using a sub-threshold leakage current that passed through the at least one bias transistor.