Threshold-Tracked SRAM Virtual Ground for Low-Leakage Retention
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Solution Overview
Problem
Existing solutions for reducing leakage current in SRAM fail to effectively maintain data integrity while minimizing power consumption, often requiring complex fabrication processes or large area increases, and lack control over virtual ground voltage.
Innovation Solution
A threshold reference voltage generation circuit that tracks the threshold voltage of memory cell transistors in SRAM, using a voltage divider and current discharge means to generate a virtual ground reference voltage based on a multiplication factor, ensuring data retention with reduced leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If transistor stacks or self-reverse bias techniques are used to reduce leakage current, then leakage current is significantly reduced, but the memory cell area increases substantially
Solution Approach 1:
The invention segments the control function by introducing a separate virtual ground node and control circuitry that operates independently from the main memory cell transistors. This allows leakage reduction through voltage control without modifying the core memory cell structure, avoiding area increase while achieving energy loss reduction.
Solution Approach 2:
The virtual ground node serves as an intermediary element that mediates between the power supply and the memory cell transistors. By controlling the virtual ground voltage, the invention indirectly controls the effective threshold voltage of the transistors, achieving leakage reduction without direct modification of the transistor stacks themselves.
2Device complexity
If simple gated-ground or virtual ground techniques are used, then implementation is simpler, but control over the virtual ground voltage is poor
Solution Approach 1:
The invention implements feedback control by monitoring the actual virtual ground voltage and adjusting the control signals to maintain the desired voltage level. This feedback mechanism ensures precise voltage control despite variations in process, voltage, and temperature, resolving the contradiction between simplicity and precision.
Solution Approach 2:
The control circuit dynamically adjusts the virtual ground voltage based on operating conditions such as read/write operations and standby modes. This dynamic control allows the system to optimize performance for different operating states while maintaining precise voltage regulation, bridging the gap between simple implementation and precise control.
3Loss of energy
If dynamic threshold voltage technique or body biasing is used, then leakage control is improved, but the fabrication process becomes more complicated requiring triple well process
Solution Approach 1:
The invention creates a copy or model of the desired threshold voltage effect through the virtual ground node, which replicates the body biasing effect without requiring actual body biasing fabrication processes. This allows standard CMOS fabrication to achieve the same leakage control as complex triple well processes, improving ease of manufacture while maintaining energy efficiency.
4Device complexity
If prior solutions with poor virtual ground voltage control are used, then implementation is simpler, but data retention reliability is compromised
Solution Approach 1:
The invention performs preliminary action by pre-establishing the virtual ground voltage to appropriate levels before memory operations. This proactive voltage control ensures that the memory cells are always in a stable state conducive to data retention, preventing reliability issues before they occur rather than reacting to them.
Data Source
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AI summary
A method and system are provided for maintaining a virtual ground node of an SRAM memory array at a minimum level sufficient for maintaining data retention. A circuit can maintain the virtual ground node at a virtual ground reference voltage of VDD-(1.5*Vth), or maintain 1.5*Vth across the memory cells, where Vth is a threshold voltage of an SRAM memory cell transistor and VDD is a positive supply voltage. By tracking the Vth of the memory cell transistors in the SRAM array, the circuit reduces leakage current while maintaining data integrity. A threshold voltage reference circuit can include one or more memory cell transistors (in parallel), or a specially wired memory cell to track the memory cell transistor threshold voltage. The value of the virtual ground reference voltage can be based on a ratio of feedback chain elements in a multiplier circuit.