SRAM Unit Cell Circuit with Assist Circuit for Voltage Collapse
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Solution Overview
Problem
Static Random Access Memory (SRAM) used in System-On-Chip (SoC) devices faces challenges in reducing operating voltage due to high minimum operating voltage and threshold voltage fluctuations, which hinder energy efficiency and performance.
Innovation Solution
A unit cell circuit is introduced, comprising a sub-cell array of memory cells and an assist circuit connected through a supply line. The assist circuit pre-charges the supply line with a supply voltage during standby mode and blocks it during write operations, helping to lower the minimum operating voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If operating voltage is lowered to improve energy efficiency, then power consumption is reduced, but write operation performance deteriorates due to supply voltage collapse
Solution Approach 1:
The assist circuit pre-charges the supply line to a higher voltage level before the write operation begins. This preliminary action ensures that when the write operation starts, there is sufficient voltage headroom to maintain reliable operation even as voltage collapses during the write process, thus enabling low nominal operating voltage while maintaining write performance.
Solution Approach 2:
The system dynamically adjusts the supply voltage timing by pre-charging the supply line before write operations and maintaining it at higher levels during critical write periods. This dynamic voltage management allows the system to adapt voltage levels to operational needs, ensuring reliable writes while maintaining low average power consumption.
2Reliability
If assist circuit is added to improve minimum operating voltage, then write operation reliability is improved, but device complexity increases
Solution Approach 1:
The assist circuit functionality is merged with the existing memory cell structure by integrating it into the column decoder or memory block. This combination approach provides the needed voltage assistance while minimizing additional complexity by reusing existing circuit resources and pathways.
Solution Approach 2:
The assist circuit acts as an intermediary between the main power supply and the memory cells during write operations. It provides the necessary voltage boosting and control without requiring fundamental changes to the core memory cell design, thus improving reliability while adding minimal complexity.
3Reliability
If supply line is blocked during write operation to maintain voltage, then minimum operating voltage is maintained, but write speed decreases
Solution Approach 1:
The supply line blocking is applied periodically and selectively only during the critical write operation window, rather than continuously. The assist circuit activates the blocking mechanism at the precise moment when write operations occur, maintaining voltage stability only when needed, thus preserving write speed while ensuring minimum operating voltage is maintained.
Data Source
AI summary
Disclosed is a unit cell circuit of a memory cell array, the unit cell circuit having a sub-cell array including a plurality of memory cells each connected to a supply line, and an assist circuit connected to the sub-cell array through the supply line that pre-charges the supply line with a supply voltage during a stand-by mode based on a control signal and blocks the supply line upon initiation of a write operation.