SRAM Well-Tie with Continuous Grated Poly Patterns

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Solution Overview

Problem

SRAM regions with well ties and substrate taps disrupt periodic photolithographic patterns for gates and contacts in integrated circuits, causing fabrication complexity and increased costs due to disrupted alternating line and space configurations.

Innovation Solution

The use of periodic photolithographic patterns with off-axis illumination sources to create continuous alternating line and space configurations across SRAM regions with well ties and substrate taps, reducing fabrication complexity and increasing process latitudes by maintaining consistent patterns across strap rows and SRAM cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If well ties and substrate taps are placed in SRAM regions, then local bias is provided to well or substrate regions, but periodic photolithographic patterns for gates and contacts are disrupted

Engineering Contradiction:
Improvelocal bias provisionVSAvoidphotolithographic pattern disruption
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating different pattern configurations in different regions. Specifically, SRAM cells adjacent to well ties or substrate taps have disrupted patterns, while SRAM cells not adjacent to these structures maintain continuous periodic patterns. This allows the photolithographic process to be optimized for each local region, maintaining manufacturing precision where possible while accommodating necessary structural variations near well ties and substrate taps.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If continuous periodic patterns are maintained across SRAM regions, then fabrication complexity is reduced and process latitude is increased, but well ties and substrate taps cannot be properly implemented

Engineering Contradiction:
Improvephotolithographic process simplicityVSAvoidwell tie and substrate tap functionality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the SRAM array into different regions based on their proximity to well ties and substrate taps. SRAM cells are divided into those adjacent to well ties/substrate taps (with disrupted patterns) and those not adjacent (with continuous patterns). This segmentation allows the manufacturing process to handle different pattern types separately, maintaining ease of manufacture for the majority of cells while ensuring proper functionality for cells requiring well ties and substrate taps.

Inventive Principle:
Principle #1Segmentation

3Reliability

If alternating line and space configurations are disrupted in SRAM regions, then well ties and substrate taps can be implemented, but manufacturing precision and process latitude decrease

Engineering Contradiction:
Improvewell tie and substrate tap implementationVSAvoidphotolithographic pattern consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating different pattern configurations in different regions. Specifically, SRAM cells adjacent to well ties or substrate taps have disrupted patterns, while SRAM cells not adjacent to these structures maintain continuous periodic patterns. This allows the photolithographic process to be optimized for each local region, maintaining manufacturing precision where possible while accommodating necessary structural variations near well ties and substrate taps.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces fabrication costs and increases process latitude by ensuring continuous periodic patterns across SRAM regions, thereby simplifying the photolithographic process and improving the integration of SRAM cells in integrated circuits.

Implementation Method 1

one or more periodic photolithographic patterns for elements of the integrated circuit such as gates and contacts

Methodology Applied
Scientific EffectPhotolithography: Photopolymerisation

Data Source

PatentUS9741724B2SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array
Publication Date: 2017.08.22 TEXAS INSTRUMENTS INC
  • US9741724B2 patent drawing
  • US9741724B2 patent drawing
  • US9741724B2 patent drawing

AI summary

An integrated circuit containing an SRAM may be formed using one or more periodic photolithographic patterns for elements of the integrated circuit such as gates and contacts, which have alternating line and space configurations in SRAM cells. Strap rows of the SRAM containing well ties and/or substrate taps which have SRAM cells on two opposite sides are configured so that the alternating line and space configurations are continuous across the regions containing the well ties and substrate taps.