SRB Stress Compensation for Balanced nMOS and pMOS Mobility
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Solution Overview
Problem
Stress relaxed buffer (SRB) layers in semiconductor devices induce biaxial stress that enhances nMOS performance but degrades pMOS performance, as the stress effects are opposite and counteract each other.
Innovation Solution
A method involving backside processing of the SRB layer to create a cavity underneath the pMOS device and filling it with a material that compensates the biaxial stress, while maintaining the stress effect on the adjacent nMOS device, using techniques like etching and filling with stress compensation materials like SiN or amorphous silicon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If uniform biaxial tensile stress is applied to enhance nMOS drive current, then nMOS performance is improved, but pMOS device performance is degraded due to counteracting stress effects
Solution Approach 1:
The SRB layer is segmented into distinct regions that provide different stress states. The first SRB region is configured to generate tensile biaxial stress specifically under the nMOS device to maximize drive current, while the second SRB region generates compressive stress under the pMOS device. This eliminates the conflict of applying uniform stress that would harm pMOS performance.
Solution Approach 2:
The patent changes the stress parameter (from uniform tensile to spatially varying tensile/compressive) in the SRB layer to simultaneously optimize both nMOS and pMOS performance. By controlling the composition, thickness, or structure of the SRB layer in different regions, the stress magnitude and direction are adjusted to match the specific requirements of each device type.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows independent control of carrier mobility in pMOS devices by counteracting the biaxial stress, thereby improving pMOS performance without affecting the nMOS device, effectively balancing the stress effects between the two types of devices.
Implementation Method 1
SRB layers are layers which create a biaxial stress in a semiconductor layer deposited on top of the SRB layer, thereby enhancing the carrier mobility in the channel of MOS transistors or diodes processed on the semiconductor layer
Implementation Method 2
filling the cavity with a material that at least partially compensates the biaxial stress induced by the SRB layer in the semiconductor material of the channel area of the device
Data Source
AI summary
Example embodiments relate to methods for inducing stress in semiconductor devices. One method includes a method for producing a first semiconductor device and a second semiconductor device configured to conduct current through the controlled density of charge carriers in a channel area. The charge carriers of the first semiconductor device have opposite polarity to the charge carriers of the second semiconductor device. The method includes producing a stress relaxed buffer (SRD) layer. The back side of the SRB layer is positioned on a substrate. The method also includes producing a semiconductor layer on the front side of the SRB layer. Additionally, the method includes producing the first semiconductor device and the second semiconductor device on the semiconductor layer, removing the substrate, thinning the SRB layer, producing a cavity in the SRB layer, and filling the cavity with a material to create a stress compensation area.