SrTiO3 Semiconductor Ceramic Capacitor Varistor Function
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Solution Overview
Problem
Laminate type semiconductor ceramic capacitors with varistor function face issues with variability in insulation performance due to low capacitance, leading to decreased product yield and inferior productivity, especially when trying to achieve high ESD withstanding voltage.
Innovation Solution
Adjusting the compounding molar ratio between Sr and Ti sites in SrTiO3 based grain boundary insulated semiconductor ceramics to 0.990≦m<1.000, incorporating specific donor and acceptor elements, and controlling crystal grain size to 1.5 μm or less, while adding low melting point oxides like SiO2, to enhance insulation and ESD withstanding capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the capacitance is lowered to on the order of 1 nF to achieve compact size, then the device size is reduced, but the ESD withstanding voltage becomes extremely low and insulation performance shows great variability
Solution Approach 1:
The patent changes the chemical composition parameters of the semiconductor ceramic by controlling the compounding molar ratio m between Sr and Ti sites to satisfy 0.990≦m<1.000, and by precisely controlling the content of acceptor elements (0.1-0.5 mol per 100 mol Ti) and donor elements (0.2-1.2 mol per 100 mol Ti), thereby achieving stable insulation performance at low capacitance values of 1 nF or less
Solution Approach 2:
The patent uses composite semiconductor ceramic materials containing multiple elements including Sr, Ti, acceptor elements (Mn, Co, Ni, Cr), and donor elements (La, Nd, Sm, Dy, Nb, Ta), creating a complex composite material system that provides both low capacitance and stable insulation performance through synergistic effects of different elements
2Reliability
If additional components like zener diodes or varistors are added in parallel to ensure ESD withstanding voltage, then the ESD protection capability is improved, but the number of components increases causing cost increase and device size increase
Solution Approach 1:
The patent makes the capacitor multi-functional by endowing it with both capacitance function and varistor function through compositional control of the semiconductor ceramic. The same capacitor structure provides both energy storage (capacitance) and overvoltage protection (varistor effect with ESD withstanding voltage of 30 kV or more), eliminating the need for separate protection components
Solution Approach 2:
The patent merges the protection function previously requiring separate zener diodes or varistors into the capacitor itself. By combining the capacitance function and varistor function in a single component through compositional design, the patent reduces component count and simplifies the circuit structure
3Reliability
If the compounding molar ratio m is set to 1.00 or more as proposed in prior art, then the ESD withstanding voltage of 30 kV or more is achieved, but the insulation performance shows great variability at low capacitance leading to decreased product yield
Solution Approach 1:
The patent identifies and exploits the critical parameter range 0.990≦m<1.000 for the compounding molar ratio, which provides a sweet spot achieving both ESD withstanding voltage of 30 kV or more and stable insulation performance with log IR of 8.0 or more, thereby improving product yield while maintaining reliability
Solution Approach 2:
The patent uses a slight Ti excess (m<1.000) rather than exact stoichiometry or Sr excess, demonstrating that a small deviation from ideal composition in a specific direction (Ti-rich side) provides optimal balance between ESD protection and insulation stability, achieving both high reliability and high productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a laminate type semiconductor ceramic capacitor with improved product yield, suitable for mass production, achieving an ESD withstanding voltage of 30 kV or more and insulation resistance log IR of 8.0 or more, even at low capacitance levels.
Implementation Method 1
a semiconductor ceramic layers formed from a SrTiO3 based grain boundary insulated semiconductor ceramic
Implementation Method 2
a bypass capacitor, to thereby ensure the noise immunity for the electronic devices
Implementation Method 3
If the capacitor had a varistor function, the need for the zener diode or the varistor will be eliminated, and the ESD (Electro-Static Discharge) withstanding voltage can also be handled by only the capacitor
Data Source
AI summary
A laminate type semiconductor ceramic capacitor with a varistor function is achieved which allows for an improvement in product yield while ensuring such insulation performance that can withstand practical use, and is suitable for mass production with a favorable ESD withstanding voltage. The semiconductor ceramic forming the semiconductor ceramic layers has a compounding molar ratio m between the Sr site and the Ti site of 0.990≦m<1.000, has a donor element such as La present as a solid solution in crystal grains, has an acceptor element such as Mn present in a grain boundary layer in the range of 0.5 mol or less (preferably 0.3 mol to 0.5 mol) with respect to 100 mol of the Ti element, and has the crystal grains with an average grain size of 1.5 μm or less.