SSB Configuration for Above 52.6 GHz Carrier Frequencies

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Solution Overview

Problem

The existing 5G new radio (NR) system faces challenges in synchronizing signal block transmission above 52.6 GHz carrier frequencies due to low power amplifier efficiency and large phase noise, requiring redesign of synchronization signals and physical broadcast channel (PBCH) configurations to reduce Peak-to-Average Power Ratio (PAPR).

Innovation Solution

The implementation of π/2-BPSK modulation for primary and secondary synchronization signals, along with Discrete Fourier Transform (DFT) or Fast Fourier Transform (FFT) for sequence generation and mapping onto subcarriers, and the redesign of PBCH and associated Demodulation Reference Signal (DMRS) to optimize transmission for carrier frequencies above 52.6 GHz, including specific sequence generation and mapping procedures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional synchronization signal and PBCH configurations are used above 52.6 GHz, then transmission can be maintained, but power amplifier efficiency is low and phase noise is large

Engineering Contradiction:
Improvesynchronization signal transmission reliabilityVSAvoidpower amplifier efficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies parameter changes by modifying the modulation scheme from conventional QPSK to π/2-BPSK for synchronization signals and PBCH. This parameter change in modulation type reduces the Peak-to-Average Power Ratio (PAPR), which directly improves power amplifier efficiency in the frequency range above 52.6 GHz by reducing the peak power requirements while maintaining reliable transmission.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If conventional synchronization signal configurations are used above 52.6 GHz, then transmission can be maintained, but phase noise causes performance degradation

Engineering Contradiction:
Improvesynchronization signal transmission reliabilityVSAvoidphase noise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs parameter changes by implementing specific sequence generation methods using DFT/FFT-based approaches and carefully designed pseudo-random sequences. These parameter changes in sequence structure and modulation characteristics make the synchronization signals more robust against phase noise effects that are particularly severe above 52.6 GHz, thereby maintaining transmission reliability despite the harmful phase noise environment.

Inventive Principle:
Principle #35Parameter changes

3Loss of energy

If PAPR is reduced through signal redesign, then power amplifier efficiency improves, but system complexity increases

Engineering Contradiction:
Improvepower amplifier efficiencyVSAvoidsignal processing complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the signal processing into distinct modular components: separate sequence generation stages, DFT/FFT processing blocks, and π/2-BPSK modulation stages. This segmented approach allows each component to be optimized independently for low PAPR performance while keeping the overall system manageable and implementable, reducing the burden of complexity despite the signal redesign requirements.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12057977B2Synchronization signal block configuration for above 52.6GHZ carrier frequency
Publication Date: 2024.08.06 INTEL CORP
  • US12057977B2 patent drawing
  • US12057977B2 patent drawing
  • US12057977B2 patent drawing

AI summary

Various embodiments herein provide techniques for synchronization signal block (SSB) configuration for wireless cellular networks. The SSB may be for carrier frequencies above 52.6 gigahertz (GHz). Other embodiments may be described and claimed.