SSCB Gate Driver Resistance Switching for Fast Fault Turn-Off
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Solution Overview
Problem
Existing solid state circuit breakers (SSCBs) face a sub-optimal compromise between minimizing over-voltage stress and turn off speed during fault interruption, with prior solutions failing to effectively balance these factors.
Innovation Solution
An open-loop control system using a lookup table populated with current and temperature values, along with a gate driver circuit that selectively engages and disengages multiple turn-off resistive elements to minimize over-voltage and turn off time, utilizing a gate driver controller to estimate and initiate the shutoff process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If gate resistance is minimized to reduce turn off time, then turn off speed is improved, but over-voltage during shutoff increases
Solution Approach 1:
The gate driver circuit dynamically adjusts the gate resistance value during the turn-off process. Instead of using a fixed gate resistance, the circuit transitions between different resistance values (first gate resistance during initial turn-off, then second gate resistance for voltage control) to optimize both turn-off speed and over-voltage mitigation at different stages of the switching process.
Solution Approach 2:
The turn-off process is segmented into distinct phases with different gate resistance values. The first gate resistance is applied during the initial current interruption phase to achieve fast turn-off, while the second gate resistance is applied during the voltage control phase to limit over-voltage. This segmentation allows each phase to be optimized independently.
2Object-affected harmful factors
If gate resistance is increased to reduce over-voltage during shutoff, then over-voltage stress is minimized, but turn off time increases
Solution Approach 1:
The gate driver applies gate resistance in periodic stages: first applying the first gate resistance for initial turn-off, then switching to the second gate resistance for voltage control. This periodic adjustment of resistance values allows the system to achieve both fast turn-off and over-voltage protection at different time intervals during the switching process.
Solution Approach 2:
The circuit performs preliminary action by first applying the lower gate resistance to quickly interrupt the current, then subsequently applying the higher gate resistance to control the voltage. This preliminary fast turn-off followed by voltage control prevents the need to choose between speed and voltage protection - both are achieved in sequence.
3Productivity
If interrupt time is reduced to minimize fault energy dissipation, then productivity is improved, but peak turn off current increases
Solution Approach 1:
The circuit changes the gate resistance parameter during the turn-off process to optimize the balance between interrupt time and peak current. By transitioning from first gate resistance to second gate resistance, the system adjusts the electrical parameters to minimize fault energy dissipation while controlling peak current through the resistive elements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution optimizes both over-voltage and turn off speed by accurately estimating interrupt time based on current and temperature, reducing gate resistance fluctuations and minimizing fault energy dissipation.
Implementation Method 1
electrically engaging at least two separately controllable turn-off resistive elements with the gate of the solid state circuit breaker in order to reduce gate resistance and thereby reduce turn-off time
Implementation Method 2
measuring a temperature of the solid state circuit breaker, measuring an electrical current passing through the solid state circuit breaker, estimating interrupt time from the lookup table based on the measured temperature and current values
Data Source
AI summary
A method of open-loop fault control of a solid state circuit breaker includes the steps of populating a lookup table with predetermined current and temperature values and corresponding interrupt times, measuring a temperature of the solid state circuit breaker, measuring an electrical current passing through the solid state circuit breaker, estimating interrupt time from the lookup table based on the measured temperature and current values, determining to initiate a shutoff of the solid state circuit breaker based on the estimated interrupt time, and initiating a shutoff process of the solid state circuit breaker.


