SSD Cache Controller Bypassing Host I/O Stack Latency

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Solution Overview

Problem

Current caching implementations in host systems introduce significant latency due to the need for additional software layers in the Input/Output stack for cache look-up operations, which can be bypassed by performing caching operations directly within a Solid State Drive (SSD) rather than relying on host-side cache management.

Innovation Solution

Implementing caching operations within the SSD, allowing Input/Output requests to be processed directly between the host system and the SSD, which functions as a cache, thereby bypassing host-side cache software layers and using SSD cache management techniques to determine data availability and manage namespace configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If host-side cache management operations are implemented, then data can be cached in faster storage device, but significant host resources are consumed and latency is introduced

Engineering Contradiction:
Improvedata retrieval speedVSAvoidcache lookup latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent extracts the cache management functionality from the host system and relocates it to the SSD controller. The host I/O stack no longer performs cache lookups or manages cache policies; instead, the SSD controller independently handles cache mapping, validity checks, and data retrieval decisions, eliminating the time-consuming host-side software layers while maintaining caching performance benefits

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces an intermediary cache layer within the SSD that sits between the host system and the primary storage device. This intermediary cache managed by the SSD controller provides fast data retrieval without requiring host resource involvement in cache management operations, effectively mediating between the host's data access needs and the primary storage's data residence

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If host-side cache software layers are added, then caching functionality is achieved, but device complexity increases

Engineering Contradiction:
Improvecaching capabilityVSAvoidI/O stack complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent removes the complex cache management software layers from the host I/O stack and consolidates all caching functionality within the SSD controller. This extraction eliminates the need for host-side cache policies, hash function implementations, and validity check mechanisms, significantly reducing the overall system complexity while preserving full caching capabilities

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The SSD controller is designed to perform multiple functions including cache management, data mapping, validity verification, and I/O operation coordination. By making the SSD controller universal and multi-functional, the patent eliminates the need for separate host-side cache management software, reducing device complexity while maintaining adaptability and caching versatility

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP3382559B1Apparatus, computer program product, and method to perform cache operations in a solid state drive
Publication Date: 2019.11.13 INTEL CORP
  • EP3382559B1 patent drawingFigure 1
  • EP3382559B1 patent drawingFigure 2~3
  • EP3382559B1 patent drawingFigure 4

AI summary

Provided are an apparatus, computer program product, and method to perform cache operations in a solid state drive. A cache memory determines whether data for a requested storage address in a primary storage namespace received from a host system is stored at an address in the cache memory namespace to which the requested storage address maps according to a cache mapping scheme. Multiple of the storage addresses in the primary storage map to one address in the cache memory namespace. The cache memory returns to the host system the data at the requested address stored in the cache memory namespace in response to determining that the data for the requested storage address is stored in the cache memory namespace.