SSD Cache Memory Configuration for Data Processing

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Solution Overview

Problem

Current solid-state storage devices (SSDs) lack the ability to manage different access performance for various types of data, as they provide a single level of data access, which does not accommodate unique performance requirements and cannot integrate cache memory to enhance storage capacity.

Innovation Solution

The implementation of a solid-state storage device with a controller and non-volatile memory, where a portion is configured as main memory and another portion as cache memory, allowing data to be written to the cache memory for processing while erasing it from the main memory, thus optimizing storage capacity and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is copied to volatile cache memory for faster access, then read performance is improved, but storage capacity is not increased because the cache holds duplicate copies

Engineering Contradiction:
Improvedata access speedVSAvoidstorage capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent applies copying by creating duplicate copies of data in both main memory and cache memory simultaneously. The controller writes data to both locations without requiring erasure from the source, enabling fast access to cached copies while preserving full storage capacity in the main memory.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an intermediary mechanism (the controller) that manages multiple memory locations (main memory and cache memory) independently. This intermediary enables data to exist in multiple locations without conflict, resolving the contradiction between fast access and storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a single level of data access is provided in SSDs, then device complexity is reduced, but adaptability to different performance requirements is limited

Engineering Contradiction:
Improveperformance requirement supportVSAvoidmemory structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the memory system into distinct portions: main memory for permanent storage and cache memory for fast access. This segmentation allows different performance characteristics in different memory regions while maintaining a unified interface to the host, thus increasing adaptability without proportionally increasing complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent makes the non-volatile memory serve multiple functions by configuring different portions as main memory and cache memory. This multi-functionality allows the same hardware to adapt to different performance requirements without requiring separate specialized devices.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11907127B2Devices, systems, and methods for configuring a storage device with cache
Publication Date: 2024.02.20 SMART IOPS INC
  • US11907127B2 patent drawing
  • US11907127B2 patent drawing
  • US11907127B2 patent drawing

AI summary

In certain aspects, one or more solid-state storage devices (SSDs) are provided that include a controller and non-volatile memory coupled to the controller. The non-volatile memory can include one or more portions configured as main memory or cache memory. When data stored in the main memory is written to the cache memory for processing, the data in the main memory is erased. In certain aspects, storage systems are provided that include one or more of such SSDs coupled to a host system. In certain aspects, methods are provided that include: receiving, by a first such SSD, a first command to write data to memory; determining that the data is stored in a main memory and is to be written to the cache memory for processing; writing the data to the cache memory; and erasing the data from the main memory.