SSD Cache Subspace Reconfiguration Without Device Reset
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Solution Overview
Problem
Existing SSD devices have fixed or non-configurable cache units, limiting the ability to dynamically adjust cache capacity in response to external requests, leading to suboptimal cache hit rates and requiring additional system resources for dynamic adjustments.
Innovation Solution
An SSD device with dynamic capacity cache that allows for configuring and changing the number of cache units without resetting the device, utilizing a cache allocator and executor to manage cache subspaces and units based on external requests, and maintaining metadata for efficient cache management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of cache units is fixed or non-configurable at runtime, then the device structure is simple, but the adaptability to external requests deteriorates
Solution Approach 1:
The patent implements dynamic cache allocation by allowing the cache subspace to be reconfigured at runtime based on external requests. The cache units can be dynamically assigned to different storage subspaces without resetting the device, enabling the system to adapt to varying workload requirements while maintaining a relatively simple underlying structure.
Solution Approach 2:
The patent changes the configurable parameters of the cache system by introducing the ability to modify the number of cache units assigned to each storage subspace during runtime. This is achieved through parameters such as cache capacity configuration and cache policy options, allowing the system to optimize performance for different scenarios without increasing fundamental device complexity.
2Reliability
If the number of cache units is fixed, then the device complexity is low, but the cache hit rate deteriorates
Solution Approach 1:
The patent improves cache hit rate by enabling dynamic adjustment of cache parameters including the number of cache units, cache capacity, and cache policies. The cache allocator can recalculate and reconfigure cache execution configurations based on actual workload patterns, ensuring optimal cache performance without requiring complex manual intervention.
Solution Approach 2:
The patent implements feedback mechanisms where the cache allocator monitors cache performance and external requests, then dynamically adjusts cache unit allocation accordingly. This closed-loop control allows the system to maintain high cache hit rates by continuously adapting to changing access patterns while keeping cache management complexity manageable through automated decision-making.
3Quantity of substance
If system memory is used for high-speed read-write caching, then the cache capacity can be increased, but the computational and memory resources outside the device increase
Solution Approach 1:
The patent extracts the cache management functionality from the external system memory and operating system, implementing it directly within the SSD device. By providing high-speed read-write caching using on-device cache units that can be dynamically allocated to storage subspaces, the system achieves the desired cache capacity without relying on additional system memory resources or external computational overhead.
4Adaptability or versatility
If the cache configuration is changed without resetting the device, then the adaptability improves, but the cache management complexity increases
Solution Approach 1:
The patent implements self-service cache management through an automated cache allocator that can reconfigure cache unit allocation without external intervention or device reset. The cache allocator autonomously calculates new cache execution configurations, manages the transition of cache units between storage subspaces, and maintains consistency, thereby enabling runtime adaptability while keeping management complexity contained within the device's control logic.
Data Source
AI summary
The present application relates to the field of SSD and discloses an SSD device with dynamic capacity cache acceleration, comprising: a memory comprising multiple storage subspaces; a cache comprising multiple cache subspaces; a cache allocator configured to calculate a cache execution configuration based on a cache configuration request for the storage subspace; a cache executor which selects a traversal range and a traversal order based on a cache execution configuration, a structured data for traverse history and a virtual index of a storage unit, and calculates minimum and maximum cost thresholds, the traversal range includes a set of cache units in a corresponding cache subspace and is divided into a plurality of pending windows; traverses the pending windows in the traversal order, calculates a cost function for each cache unit in the current pending window based on a structured state table, and selects a cache unit with a cost function that is less than the minimum cost threshold. This application configures and changes the cache subspace without resetting the device.