SSD Command Format Translation for Efficient NAND Bus Transmission
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Solution Overview
Problem
The inefficiency in data transmission over the ASIC-NAND bus due to the disparity between command and data transmission rates, leading to unnecessary occupation of the channel and complexity in managing the NAND bus interface, is addressed by implementing a compressed/improved command format that is translated to the legacy format for execution by the NAND device's logic.
Innovation Solution
A data storage device with a controller configured to detect and decompress compressed commands, and a NAND side that decodes them, allowing for efficient command transmission using a compressed format that is translated to the legacy format for execution, thereby optimizing command length and reducing unnecessary data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the legacy long command format is used for transmission over the ASIC-NAND bus, then compatibility with existing NAND devices is maintained, but channel occupation time increases and transmission efficiency deteriorates
Solution Approach 1:
The command transmission process is segmented into two distinct formats: a compressed command format for efficient transmission and a legacy long command format for compatibility. The controller selectively uses the compressed format when compatibility is not a constraint, thereby reducing channel occupation time while maintaining the option to use legacy format when needed.
Solution Approach 2:
The system dynamically switches between compressed and legacy command formats based on the transmission requirements. The controller can adaptively choose the appropriate format, making the command transmission mechanism flexible and responsive to different operational contexts, thus optimizing transmission efficiency without sacrificing compatibility when necessary.
2Productivity
If compressed command format is used to reduce channel occupation time, then transmission efficiency improves, but device complexity increases due to format translation requirements
Solution Approach 1:
The controller acts as an intermediary that translates between the compressed command format (used for efficient transmission) and the legacy long command format (understood by NAND devices). This intermediary function is implemented within the controller's existing architecture, minimizing the complexity increase while enabling efficient transmission.
Solution Approach 2:
The compressed command format is a streamlined version of the legacy format, copying only the essential information needed for command execution. The controller generates both formats as needed, with the compressed format serving as an optimized representation that reduces channel occupation time without requiring complete redesign of the NAND interface.
3Use of energy by stationary object
If command transmission is optimized to reduce channel occupation time, then power consumption decreases, but the complexity of managing the NAND bus interface increases
Solution Approach 1:
The controller autonomously manages the command format selection and translation without requiring complex external coordination. The self-service capability allows the controller to independently choose the optimal format, reducing channel occupation time and power consumption while containing the interface management complexity within the controller's own logic.
Data Source
AI summary
In addition to transmitting over the ASIC-NAND bus the legacy long command format, a data storage device will be able to use also a compressed/improved command format. The alternate command's format is hidden from most parts of the NAND. The NAND can have a layer that will translate compressed/non standard commands to the legacy (standard) format for use by the rest of the NAND device's logic, as currently implemented. According to selected command format, the Low Level Flow Sequencer (LLFS) sequence generator and the flash interface module (FIM) will know which format to use in order to encode the command's content for transmission to the NAND by the FIM/ASIC/controller. The command is then executed on the NAND side according to the selected command scheme. Changes will be applied in the device controller on the ASIC side—to encode the command, and on the NAND side—to decode the command according to the selected format. The controller on the ASIC side decides on the desired format and is responsible to sync any format change with the NAND before sending a command in a different format than currently agreed between the controller and the NAND.