SSD Memory Controller Randomization for NAND Cell Coupling
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Solution Overview
Problem
In solid-state drives (SSDs) using NAND flash memory, the reliability of memory data is degraded due to inter-cell coupling, which causes adjacent cells to store the same '1' or '0' values, leading to broadened threshold distributions and incorrect readouts of '0' or '1' values.
Innovation Solution
A memory controller is implemented with an encoder for error correction coding, a randomizing circuit to randomize data, and an interface that ensures data is written in sizes larger than or equal to the write unit of the nonvolatile semiconductor memory, thereby reducing the likelihood of sequential '1' or '0' values and preventing reliability degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the controller writes coded data smaller than one page size to the memory unit, then the write efficiency is improved, but the threshold distribution broadens and reliability of memory data is degraded
Solution Approach 1:
The patent applies preliminary action by performing data randomization before writing to the memory unit. The randomizing circuit processes the coded data in advance to prevent sequential '1' or '0' patterns, thereby preventing threshold distribution broadening before it occurs. This preliminary randomization ensures that even when writing smaller than page size, the reliability degradation is prevented.
Solution Approach 2:
The patent introduces a randomizing circuit as an intermediary component between the encoder and the memory unit. This intermediary process transforms the coded data by randomizing bit patterns, thereby mediating between the need for efficient small writes and the requirement for reliable data storage. The randomization acts as a buffer that prevents direct harmful effects of sequential patterns on threshold distribution.
2Ease of manufacture
If adjacent cells store the same '1' or '0' values due to sequential writing, then the write operation is simplified, but inter-cell coupling raises threshold values and broadens threshold distribution
Solution Approach 1:
The randomizing circuit serves as an intermediary that transforms simplified sequential write operations into reliable storage operations. By inserting the randomization step between the simple write operation and the memory cells, the patent prevents direct harmful interactions between adjacent cells while maintaining the simplicity of the overall write process.
Solution Approach 2:
The patent changes the parameter of data bit patterns through randomization. Instead of writing sequential identical values (degenerate case), the randomizing circuit transforms the data to have varied bit patterns, thereby changing the physical state of stored data and preventing threshold distribution broadening caused by inter-cell coupling.
3Quantity of substance
If the controller adjusts input data to match page size exactly, then the memory utilization is optimized, but the flexibility in handling variable-size data is reduced
Solution Approach 1:
The patent applies preliminary randomization to data of any size before writing to the memory unit. This preliminary action allows the system to accept variable-size data from the host device, randomize it, and then write it efficiently to the memory unit without requiring exact page size matching. The randomization is performed regardless of data size, enabling both flexible data handling and efficient memory utilization.
Data Source
AI summary
According to one embodiment, a memory controller includes an encoder, a randomizing circuit, and an interface. The encoder subjects first data received from an external device to error correction coding. The randomizing circuit randomizes second data output from the encoder. The interface transmits third data output from the randomizing circuit to a nonvolatile semiconductor memory and controls write/read of the nonvolatile semiconductor memory. The interface transmits data of a size larger than or equal to a size of a write unit of the nonvolatile semiconductor memory to the nonvolatile semiconductor memory in a write sequence.