SSD Controller Encryption Flow Without Runtime Speed Loss

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Solution Overview

Problem

Existing data storage devices with self-encryption capabilities suffer from reduced system operation speed due to the need for a separate hardware module for encryption and decryption during runtime, which affects performance.

Innovation Solution

A method for performing encryption and decryption operations within the data storage device without adding a separate hardware module by utilizing an encryption module integrated into the controller, enabling encryption and decryption based on requests from the host, and managing operations through a buffer memory and non-volatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a separate hardware module is provided for encryption and decryption operations, then encryption and decryption functionality is achieved, but system operation speed is reduced

Engineering Contradiction:
Improveencryption and decryption functionalityVSAvoidsystem operation speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent merges the encryption module with the controller, integrating encryption and decryption functionality into the existing controller structure. This eliminates the need for a separate hardware module while maintaining encryption capabilities, thereby resolving the contradiction between functionality and speed.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The controller is designed to perform multiple functions including data management, address translation, and encryption/decryption operations. By making the controller universal, the patent avoids adding separate dedicated hardware modules while achieving the required encryption functionality without compromising system speed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a separate module is provided for encrypted data handling, then data security is maintained, but operation speed between CPU and DRAM is reduced

Engineering Contradiction:
Improvedata securityVSAvoidoperation speed between CPU and DRAM
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The encryption module is merged with the controller, allowing encryption and decryption operations to be performed as part of the normal data access flow between the CPU and DRAM. This integration maintains data security while avoiding the speed penalty associated with separate hardware modules.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The controller acts as an intermediary that handles encryption and decryption operations transparently during data transfers between the CPU and DRAM. This intermediary role allows secure data handling without creating a separate bottleneck, as the encryption module works in conjunction with the existing data path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12511242B2Data storage devices using non-volatile memory devices and operating methods thereof
Publication Date: 2025.12.30 SAMSUNG ELECTRONICS CO LTD
  • US12511242B2 patent drawing
  • US12511242B2 patent drawing
  • US12511242B2 patent drawing

AI summary

An operating method of a data storge device including a buffer memory, a non-volatile memory, and a controller, includes receiving, from a host, an encryption request for data stored in the buffer memory, and performing an encryption operation in response to the encryption request, wherein the performing of the encryption operation comprises performing a program operation, the performing of the program operation comprises receiving a physical address of a buffer region of the non-volatile memory, generating encrypted data by causing an encryption module included in the controller to be in an on state to encrypt the data stored in the buffer memory, and programming the encrypted data in the buffer region of the non-volatile memory based on the physical address.