SSD Controller LBA Update Frequency Tracking

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Solution Overview

Problem

Current NAND-flash solid-state drives (SSDs) face challenges in optimizing performance due to increased write amplification caused by mixing data of varying update frequencies within blocks, leading to reduced endurance and life span, as existing garbage collection algorithms do not effectively distinguish between hot and cold data.

Innovation Solution

The implementation of a garbage collection function that considers the garbage collection count of blocks and notifies the host of LBA-based update frequencies, allowing for improved garbage collection operations that separate data based on update frequencies, thereby reducing write amplification and extending SSD life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data of varying update frequencies is mixed within blocks, then storage capacity utilization is improved, but write amplification increases and endurance decreases

Engineering Contradiction:
Improvestorage capacity utilizationVSAvoidwrite amplification
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent segments data into hot data (frequently updated) and cold data (infrequently updated) based on update frequency thresholds. The garbage collection function selectively identifies and processes only hot data blocks for relocation, while leaving cold data blocks intact. This segmentation allows the system to maintain high storage capacity utilization by keeping both hot and cold data in the same physical blocks, while reducing write amplification by performing garbage collection operations only on the necessary hot data portions.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If traditional garbage collection is performed without distinguishing data types, then free space management is simplified, but program/erase cycle count increases reducing SSD life

Engineering Contradiction:
Improvegarbage collection operation simplicityVSAvoidSSD life span
Core Design Contradiction:
Ease of operationVSDuration of action of stationary object

Solution Approach 1:

The patent introduces a new parameter - update frequency threshold - to differentiate between hot and cold data. The garbage collection function uses this parameter to make intelligent decisions about which data blocks require relocation. By changing the parameter (threshold value) dynamically or statically, the system can adapt to different workload patterns while extending SSD life through reduced unnecessary program/erase cycles.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If LBA-based update frequency tracking is implemented, then data distribution optimization is improved, but controller complexity increases

Engineering Contradiction:
Improveperformance optimizationVSAvoidcontroller complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the controller tracks update frequencies of logical block addresses (LBAs) and uses this information to guide garbage collection decisions. The controller monitors write operations to specific LBAs, calculates update frequencies, and feeds this information back to the garbage collection function. This feedback loop enables automated optimization of data distribution without requiring complex manual configuration or intervention.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10713161B2Memory system and method for controlling nonvolatile memory
Publication Date: 2020.07.14 KIOXIA CORP
  • US10713161B2 patent drawing
  • US10713161B2 patent drawing
  • US10713161B2 patent drawing

AI summary

According to one embodiment, a memory system includes a nonvolatile memory, and a controller electrically connected to the nonvolatile memory. The controller receives, from a host, a write command including a logical block address. The controller obtains a total amount of data written to the nonvolatile memory by the host during a time ranging from a last write to the logical block address to a current write to the logical block address, or time data associated with a time elapsing from the last write to the logical block address to the current write to the logical block address. The controller notifies the host of the total amount of data or the time data as a response to the received write command.