SSD Controller Secondary Mapping Table for Page Fault Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data storage devices, such as solid state drives (SSDs), face challenges in reducing page faults when accessing memory-mapped components, which can lead to increased memory access latency and processing delays for host devices.

Innovation Solution

Implementing a secondary mapping table within the SSD controller to map virtual addresses from the host device to physical addresses in the SSD's memory array, allowing the SSD controller to handle page faults transparently and reduce latency by allocating memory and updating mappings without interrupting the host device's operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the host device directly accesses memory-mapped components by converting virtual addresses to physical addresses using page tables, then the host device can access SSD memory, but numerous page faults occur increasing memory access latency

Engineering Contradiction:
Improvememory access speedVSAvoidmemory access latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent introduces a secondary mapping table as an intermediary layer between the host's virtual address space and the SSD's physical memory array. This secondary mapping table, maintained by the SSD controller, translates virtual addresses to physical addresses within the SSD, eliminating the need for the host to directly manage page tables for SSD memory and thereby reducing page faults and access latency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements a localized mapping mechanism where the SSD controller maintains its own secondary mapping table specific to the SSD's memory architecture. This allows the SSD to independently manage address translation for its own memory components without burdening the host system's global page table management, improving local memory access efficiency.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If the host device manages all address mapping operations, then complete control over virtual to physical address conversion is maintained, but the host processor is burdened with additional processing tasks

Engineering Contradiction:
Improvehost device controlVSAvoidhost processor efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent extracts the address mapping function from the host device and relocates it to the SSD controller. The secondary mapping table is maintained by the SSD controller rather than the host, removing the processing burden from the host while preserving the host's ability to access SSD memory through standard interfaces.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The SSD controller performs self-service by independently managing its own address mapping through the secondary mapping table. This allows the SSD to autonomously handle virtual to physical address conversion without requiring host intervention, freeing the host processor for other tasks while maintaining full control over memory access operations.

Inventive Principle:
Principle #25Self-service

3Loss of time

If a secondary mapping table is implemented in the SSD controller, then page faults are reduced and access latency is decreased, but the SSD controller complexity increases

Engineering Contradiction:
Improvememory access latencyVSAvoidSSD controller complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The secondary mapping table in the SSD controller serves multiple functions: it translates virtual addresses to physical addresses, manages memory allocation within the SSD, and handles page fault resolution. This multi-functionality justifies the increased controller complexity by consolidating multiple memory management tasks into a single integrated mechanism.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11169736B2Data storage device equipped to reduce page faults in host device
Publication Date: 2021.11.09 SANDISK TECHNOLOGIES LLC
  • US11169736B2 patent drawing
  • US11169736B2 patent drawing
  • US11169736B2 patent drawing

AI summary

The disclosure relates in some aspects to a controller of a data storage device, such as the controller of a solid state device (SSD) having non-volatile memory (NVM). In some aspects, the controller operates to prevent or reduce page faults in the host device. In one example, an outer mapping table of a set of page tables of a host device stores pointers to an inner mapping table in the SSD controller. The pointers are provided within memory access requests sent from the host to the SSD. The inner table maps the pointers to physical addresses in the SSD. The SSD detects page faults by identifying pointers that do not have corresponding entries in the inner table. The SSD allocates physical addresses to accommodate such access requests, then executes the requests on behalf of the host device. In this manner, the page fault is transparent to the host.