SSD Controller Power Credit Scheduling for Read Latency

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Solution Overview

Problem

Power management in solid state drives (SSDs) often results in read operations being stalled due to power credit starvation, particularly when the SSD is operating close to its maximum power limit, leading to high read latencies and inefficiencies in flash operation scheduling.

Innovation Solution

The SSD controller proactively checks for program or erase suspends and employs a power management system that allows for the suspension and resumption of suspendable operations, releasing and re-requesting power credits to ensure sufficient power for read operations, thereby preventing stalling and optimizing flash operation scheduling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the SSD operates close to its maximum power limit to maintain high performance for program and erase operations, then the power availability for read operations decreases, but read operation latency increases and read performance deteriorates

Engineering Contradiction:
Improvepower availability for read operationsVSAvoidread operation latency
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The patent implements dynamic power credit management where the controller continuously monitors power credit availability and adjusts flash operation scheduling in real-time. When power credits are insufficient, the controller dynamically suspends program or erase operations and reallocates power credits to read operations, ensuring read operations can proceed without excessive latency while the SSD operates near its power limit.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational state of flash operations by introducing suspendable operations that can be paused and resumed. By changing the parameter of operation continuity (from always executing to conditionally suspended), the controller can release power credits from suspended operations and reallocate them to read operations, thereby improving read performance without requiring the SSD to operate below its power limit.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If program or erase operations are scheduled to maximize storage performance, then power credits are consumed, but read operations may be stalled due to power credit starvation

Engineering Contradiction:
Improveflash operation throughputVSAvoidread operation completion guarantee
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the controller continuously monitors power credit availability and the status of ongoing flash operations. Based on this feedback, the controller makes informed decisions about whether to suspend or continue program and erase operations. This feedback loop ensures that read operations are guaranteed sufficient power credits to complete reliably while maintaining overall flash operation productivity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts the scheduling of flash operations based on real-time power credit conditions. Program and erase operations are configured as suspendable, allowing the controller to pause these productivity-intensive operations when power credits become insufficient, thereby guaranteeing that read operations can complete reliably. When power credits become available again, the suspended operations are resumed.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If the controller allows read operations to be scheduled without suspension, then read latency is reduced, but power credits may be insufficient when operating near the power limit

Engineering Contradiction:
Improveread operation latencyVSAvoidpower credit availability
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary anti-action by proactively suspending program or erase operations before power credit exhaustion occurs. The controller monitors power credit levels and preemptively pauses non-critical flash operations to prevent power credit starvation of read operations. This preliminary action ensures that sufficient power credits are always available for read operations, maintaining low read latency even when the SSD operates near its power limit.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS11321022B2Systems and methods for scheduling flash operations
Publication Date: 2022.05.03 KIOXIA CORP
  • US11321022B2 patent drawing
  • US11321022B2 patent drawing
  • US11321022B2 patent drawing

AI summary

Various implementations described herein relate to systems and methods for a solid state drive (SSD) that includes requesting power credits while performing a program or erase operation for a flash memory of the SSD. In response to determining that the requested power credits are rejected, the program or erase operation is suspended and its power credits are released. A read operation may then be performed in response to suspending the program or erase operation and releasing its power credits.