Solid State Controller Sequencer for Flash Memory Latency Reduction
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Solution Overview
Problem
Conventional firmware in embedded systems experiences high latency due to the need to wait for status inquiries from non-volatile flash memory devices, limiting the ability to process multiple commands simultaneously and increasing queue delays.
Innovation Solution
A solid state controller with a sequencer is used to manage and forward commands to flash memory devices, allowing for simultaneous processing and communication of command status information without requiring firmware to poll each command individually, thereby reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If firmware issues one command at a time and waits for status inquiry completion before issuing the next command, then command processing is simple and reliable, but latency increases and productivity decreases
Solution Approach 1:
The firmware is segmented into two distinct functional components: a command issuance module that can send multiple commands to the flash memory device without waiting, and a status inquiry module that separately polls for command completion status. This segmentation allows commands to be issued in batches while status checks occur independently, thereby increasing throughput while maintaining reliability through separate error handling paths.
Solution Approach 2:
The firmware performs preliminary actions by issuing multiple commands to the flash memory device in advance before any status inquiries are made. Commands are queued and sent ahead of time, and the firmware only waits for status when actually needed. This preliminary command issuance eliminates idle waiting periods and increases overall command processing productivity while maintaining system reliability.
2Measurement precision
If firmware remains on standby to receive command status, then accurate status information is obtained, but time is lost and latency increases
Solution Approach 1:
Instead of continuous standby waiting, the firmware implements periodic status inquiry actions at optimized intervals. The system sends commands in batches and then periodically polls for status at predetermined time points, rather than waiting continuously after each command. This periodic approach maintains accurate status information while significantly reducing the time lost to waiting, thereby decreasing command latency.
Solution Approach 2:
The firmware maintains continuity of useful action by eliminating idle standby periods between command issuance and status checking. While commands are being processed by the flash memory device, the firmware continuously issues new commands or performs other useful operations rather than remaining on standby. Status inquiries are inserted only when necessary, ensuring continuous productive activity while maintaining accurate status information.
3Device complexity
If firmware processes commands sequentially with standby cycles, then device control is simple, but queue delays increase and productivity decreases
Solution Approach 1:
The command processing system is segmented into independent functional blocks: a command queue manager that handles command issuance, a status poller that independently checks completion status, and a results processor that handles outcomes. This segmentation increases productivity by allowing parallel operation of these blocks while maintaining relatively simple device control through well-defined interfaces between segments.
Solution Approach 2:
An intermediary status register or buffer is introduced between the flash memory device and the firmware processing logic. This intermediary holds command status information and allows the firmware to efficiently poll status without complex direct device communication protocols. The intermediary simplifies control by providing a standardized interface while enabling high-throughput command processing through efficient batch status queries.
Data Source
AI summary
In some implementations, a method includes receiving information in a storage device controller from one or more storage devices in a solid state drive system over one or more channels; and for information received over each of the one or more channels, determining whether a condition for sending the information received over the channel to a host device is satisfied, and sending the information received over the channel to the host device when the condition for sending the information is satisfied.