SSD Controller Dynamic SLC MLC Mode Switching
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Solution Overview
Problem
Non-volatile memory systems, such as solid-state drives (SSDs) using NAND flash memory, face limitations in program/erase cycles and performance due to the trade-off between write speed and lifespan, particularly when operating in single-level cell (SLC) mode, which increases program/erase cycles and reduces total byte written (TBW), leading to a shortened lifespan.
Innovation Solution
A memory system and control method that dynamically switch between SLC and multi-level cell (MLC) modes based on idle states, writing data in SLC mode until a threshold is reached, then switching to MLC mode to extend program/erase cycles and maintain performance, with the controller detecting idle periods to adjust the allowable data amount and revert to SLC mode to improve write speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is written in SLC mode to improve write speed, then write performance is improved, but the number of program/erase cycles increases and lifespan is reduced
Solution Approach 1:
The system dynamically switches between SLC and MLC modes based on real-time conditions. The controller monitors write operations and automatically transitions from SLC mode (high speed, low endurance) to MLC mode (lower speed, high endurance) when appropriate, making the system adaptable to different operational requirements and extending overall lifespan while maintaining performance when needed.
Solution Approach 2:
The patent changes the operational parameters of the memory cells by switching between different cell configurations. SLC mode uses 1 bit per cell for faster writes, while MLC mode uses multiple bits per cell for increased capacity and reduced wear. This parameter change allows the system to optimize between speed and durability based on current needs.
2Reliability
If data is written in MLC mode to extend program/erase cycles, then lifespan is extended, but write speed is reduced
Solution Approach 1:
The system dynamically adjusts its operational mode based on current workload and performance requirements. When high write speed is needed, the controller switches to SLC mode temporarily, and when sustained operations are expected, it transitions to MLC mode for better endurance, creating a dynamic balance between speed and lifespan management.
Solution Approach 2:
The controller periodically monitors write operations and switches between SLC and MLC modes based on accumulated write counts and performance thresholds. This periodic evaluation allows the system to alternate between high-speed SLC mode and high-endurance MLC mode, optimizing both write speed and lifespan over time through rhythmic mode transitions.
3Productivity
If the allowable data amount in SLC mode is increased to improve write performance, then more data can be written faster, but program/erase cycles are consumed more quickly
Solution Approach 1:
The controller implements feedback mechanisms by monitoring the number of write operations performed in SLC mode and the remaining program/erase cycle capacity. When thresholds are reached, the system automatically reduces the allowable data amount in SLC mode or switches to MLC mode, using feedback from operational status to dynamically adjust performance parameters and prevent excessive wear.
Data Source
AI summary
A memory system includes a non-volatile memory having a plurality of memory cells, and a controller configured to carry out write operations in a first mode in which n-bit data is written per target memory cell of the non-volatile memory until an allowable data amount of data items has been written, and then, in a second mode in which m-bit data is written per target memory cell of the non-volatile memory, where n is an integer of one or more and m is an integer greater than n. The controller is further configured to detect that an idle state, in which a command has not been received from the host, has continued for a threshold period of time or more, increase the allowable data amount in response thereto, and after the increase, carry out a write operation to write data items in the non-volatile memory in the first mode.