SSD Data Path CRC Segmentation for Soft Error Correction
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Solution Overview
Problem
Conventional systems inadequately address soft errors in Solid State Drives (SSDs), particularly in components like SRAM, DRAM, and digital logic, which can lead to device hang, data corruption, and unrecoverable errors due to ionizing radiation, as existing End-to-End Error Detection (E3D) schemes fail to correct soft errors occurring before ECC protection or during garbage collection.
Innovation Solution
The implementation of a soft error detection structure that generates and uses multiple CRC signatures to validate data integrity along the data path, allowing real-time detection and correction of soft errors before writing to NAND flash memory, thereby improving reliability and reducing redundancy data written to non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional E3D schemes are used for error detection, then hard errors in non-volatile memory can be corrected, but soft errors in controller components (SRAM, DRAM, digital logic) cannot be detected or corrected
Solution Approach 1:
The error detection structure is segmented into multiple independent CRC generators placed at different locations along the data path (between host interface and NAND flash interface). Each segment generates its own CRC signature for the data it protects, allowing localized soft error detection without requiring a complete system-wide redesign.
Solution Approach 2:
CRC signatures act as intermediary elements that mediate between the data path components and the error detection logic. Multiple CRC signatures are generated for the same data at different points, serving as intermediaries to detect soft errors that occur between generation points without directly monitoring every component.
2Reliability
If multiple CRC signatures are generated and validated along the data path, then soft errors can be detected and corrected in real-time, but the device complexity increases
Solution Approach 1:
The error detection functionality is merged with the existing data path architecture by integrating CRC generators into the data flow between host interface and NAND flash interface. Multiple CRC signatures are generated and validated within the same data path infrastructure, combining error detection with existing data processing operations rather than adding separate monitoring systems.
Solution Approach 2:
CRC signatures are generated preliminarily at multiple points along the data path before data is written to or read from NAND flash memory. This preliminary generation of multiple signatures allows soft errors to be detected early in the data flow, preventing corrupted data from being stored or processed further.
3Reliability
If soft error detection is implemented throughout the data path, then system reliability improves, but overhead on NAND flash memory devices increases
Solution Approach 1:
The error detection approach uses local quality by generating CRC signatures specifically for protecting controller components (SRAM, DRAM, digital logic) along the data path, rather than applying uniform error protection to all data. The multiple CRC signatures are tailored to detect soft errors in specific locations where they are most likely to occur, optimizing protection where needed without unnecessary overhead elsewhere.
Data Source
AI summary
Various implementations described herein relate to systems and methods for detecting soft errors, including but not limited to, errors introduced after reading a codeword from a non-volatile memory, and before providing data to a host. Embodiments can include decoding the codeword from the non-volatile memory to obtain at least input data, and determining validity of the input data using a first signature after processing the input data through a data path. If it is determined that the input data is valid using the first signature, the input data is sent to a host.