SSD DRAM Bank Management for Power Optimization

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Solution Overview

Problem

Storage devices face challenges in optimizing power consumption and performance due to power ceilings and the need to balance the use of internal and external RAM, which affects data access latency and cache efficiency.

Innovation Solution

The storage device includes a power optimization module that dynamically adjusts RAM usage policies based on power usage thresholds, switching between internal and external RAM to maintain performance while adhering to power ceilings, and prioritizing DRAM usage during high-performance modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the storage device uses DRAM to store large amounts of data such as flash translation table, then the storage device can meet performance targets, but the power consumption increases and exceeds the power ceiling

Engineering Contradiction:
ImproveperformanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically switches between using DRAM and HMB based on real-time power consumption monitoring. When power consumption is below the ceiling, DRAM is used for high-performance operations. When power consumption approaches or exceeds the ceiling, the system transitions to using HMB, thereby adapting the memory architecture to power constraints.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters by switching between different memory technologies (DRAM vs HMB) based on power consumption thresholds. This parameter change allows the system to maintain performance when power is available while reducing power consumption when the ceiling is approached.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If the storage device uses HMB to store information in the flash translation table, then the power consumption remains under the ceiling, but the data access latency increases due to swapping data in and out of the HMB

Engineering Contradiction:
Improvepower consumptionVSAvoiddata access latency
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The system dynamically selects between DRAM and HMB based on power consumption conditions. When power is sufficient, DRAM is used to avoid latency. When power constraints are active, HMB is used to reduce power consumption, accepting the trade-off of increased latency.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system continuously monitors power consumption and uses this feedback to determine whether to use DRAM or HMB. This closed-loop control ensures that the system responds to power conditions in real-time, switching memory architectures accordingly.

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If the storage device uses portions of DRAM and HMB to remain under the power ceiling, then the power consumption is controlled, but the cache efficiency decreases due to frequent swapping operations

Engineering Contradiction:
Improvepower consumptionVSAvoidcache efficiency
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The system dynamically adjusts its memory architecture based on power consumption. When power is available, it uses DRAM for efficient caching. When power constraints are active, it transitions to HMB, accepting reduced cache efficiency as a trade-off for power savings.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes its operational parameters by switching between different memory architectures (DRAM-only, HMB-only, or hybrid) based on power consumption thresholds, thereby adapting cache efficiency to power constraints.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250103220A1Enabling power optimization through dram bank management in solid state drives
Publication Date: 2025.03.27 SANDISK TECHNOLOGIES LLC
  • US20250103220A1 patent drawing
  • US20250103220A1 patent drawing
  • US20250103220A1 patent drawing

AI summary

A storage device optimizes performance and operates under a predefined power ceiling. The storage device determines its power usage and when the power usage is below a power ceiling threshold, the storage device operates according to a first random-access memory (RAM) usage policy and uses an internal RAM in processing host data. When the power usage is above the power ceiling threshold, the storage device operates according to a second RAM usage policy and uses an external RAM or the external RAM and portions of the internal RAM in processing the host data. The storage device switches to the first RAM usage policy when it determines that the host device is operating in a high-performance mode, there is a drop in cache hits on the external RAM, or a congestion level on a link between the host device and the storage device is above a congestion threshold.