SSD DRAM Sharing in Ring-Connected All-Flash Arrays

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Solution Overview

Problem

In storage systems with multiple SSDs, DRAM resources are often underutilized or overflow, leading to performance degradation and inefficiencies due to lack of inter-SSD communication and resource balancing.

Innovation Solution

Implementing a DRAM sharing mechanism between SSDs in an all-flash array (AFA) through a ring topology connection, allowing data to be transferred between SSDs with available DRAM when one SSD's DRAM is full, using packet switching and software/hardware modifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DRAM is allocated to each SSD independently, then each SSD can operate autonomously, but DRAM resources are underutilized and overflow occurs when workload increases

Engineering Contradiction:
ImproveSSD autonomous operationVSAvoidDRAM resource utilization
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges DRAM resources from multiple SSDs into a shared pool by establishing inter-SSD communication channels. When one SSD's DRAM is full, data can be offloaded to another SSD's available DRAM space through these communication channels, effectively combining the DRAM capacity of multiple devices into a unified resource pool that serves the entire array.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent makes DRAM resources universal across the SSD array by enabling any SSD to serve as backup storage for any other SSD. The DRAM in each SSD becomes a multi-functional resource that can store data for its own workload as well as for other SSDs in the array, increasing overall resource utilization and preventing overflow.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If more DRAM is allocated to each SSD, then read/write performance and reliability improve, but cost increases

Engineering Contradiction:
Improveread/write performanceVSAvoidDRAM cost
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent combines the DRAM capacity of multiple SSDs into a shared resource pool, allowing the system to achieve the performance benefits of large DRAM capacity without allocating large amounts of DRAM to each individual SSD. The merged DRAM space across the array provides sufficient buffering and caching capacity for maintaining high read/write performance while reducing per-SSD DRAM requirements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables SSDs to serve each other's DRAM overflow needs through inter-SSD communication. Instead of each SSD requiring its own large DRAM capacity, SSDs can offload excess data to neighboring SSDs with available DRAM space, making the system self-sufficient in managing DRAM resources without additional hardware investment.

Inventive Principle:
Principle #25Self-service

3Quantity of substance

If DRAM space is reduced to lower cost, then cost decreases, but DRAM overflow occurs more frequently causing performance degradation

Engineering Contradiction:
ImproveDRAM costVSAvoidperformance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent introduces inter-SSD communication channels as intermediaries that connect the DRAM spaces of multiple SSDs. When an SSD experiences DRAM overflow due to reduced local DRAM capacity, these communication channels serve as mediators to transfer data to other SSDs with available DRAM space, preventing performance degradation despite smaller individual DRAM allocations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent makes the reduced DRAM capacity in each SSD universal across the array, allowing any SSD to function as overflow storage for any other SSD. This multi-functional usage of DRAM space ensures that even with reduced individual capacity, the system maintains sufficient total buffering capacity to prevent overflow and maintain performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If SSDs are grouped into an all-flash array, then storage capacity increases, but resource balancing becomes challenging due to lack of inter-SSD communication

Engineering Contradiction:
Improvestorage capacityVSAvoidresource balancing
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

The patent establishes inter-SSD communication channels as intermediaries that enable resource balancing across the all-flash array. These communication channels allow the system to monitor and redistribute DRAM usage dynamically, balancing resources across SSDs based on current workload demands and preventing any single SSD from becoming a bottleneck.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent introduces dynamic resource allocation across the SSD array through inter-SSD communication. Instead of static DRAM allocation, the system can dynamically adjust which SSD holds which data in its DRAM based on availability and demand, enabling flexible resource balancing that adapts to changing workload conditions in real-time.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12504926B2Computational storage acceleration using DRAM sharing between SSD in all-flash array
Publication Date: 2025.12.23 SAMSUNG ELECTRONICS CO LTD
  • US12504926B2 patent drawing
  • US12504926B2 patent drawing
  • US12504926B2 patent drawing

AI summary

A method for accelerating computational storage in an all-flash-array that comprises a plurality of solid state drives (SSDs) connected in a ring topology. The method includes receiving, by a controller of a first SSD, a request to read or write data from a dynamic random access memory (DRAM) associated with the first SSD, creating a packet that includes an identifier for the first SSD in the ring topology, an identifier for the packet, and a read/write flag that identifies the request, and transmitting the packet to a next SSD in the ring topology. When the request is a read request and a read data address is not located in the DRAM, the read/write flag indicates a read-request, and when the request is a write request and the DRAM is full, the read/write flag indicates a write-request, and the packet includes data to be written.