SSD Two-Level ECC for High-Temperature Data Reliability
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Solution Overview
Problem
Data stored in memory devices, particularly at elevated temperatures or for extended periods without power, is prone to errors due to increased risk of data corruption, which can lead to loss of useful data.
Innovation Solution
Implementing two levels of parity protection, where a second level of error correction code with higher error correction capability is used for specific data portions identified as susceptible to errors, such as those stored in memory cells operating at elevated temperatures or for extended storage times, to enhance data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single level of error correction code is used, then device complexity is reduced, but data reliability deteriorates under elevated temperatures
Solution Approach 1:
The patent divides the error correction mechanism into two distinct levels: a first error correction code (ECC1) for general error correction and a second error correction code (ECC2) specifically for high-temperature conditions. This segmentation allows the system to address different error scenarios with appropriate correction strategies, improving overall data reliability without requiring a single complex ECC system to handle all cases
Solution Approach 2:
The system dynamically selects which error correction code to apply based on the operating temperature. When temperature exceeds a threshold, the system switches from using only ECC1 to using both ECC1 and ECC2. This dynamic adaptation allows the error correction capability to match the actual error risk level, maintaining data reliability while avoiding unnecessary complexity during normal operating conditions
2Reliability
If error correction capability is increased, then data reliability improves, but processing time increases
Solution Approach 1:
The patent implements partial error correction by applying the second error correction code (ECC2) only to specific portions of data that are more susceptible to errors under high-temperature conditions, rather than applying a comprehensive high-capacity ECC to all data. This partial action approach provides sufficient error correction capability for critical data while avoiding the full processing overhead of a complete high-strength ECC system
Solution Approach 2:
The system applies different error correction strengths to different portions of data based on their susceptibility to errors. The second error correction code (ECC2) is specifically targeted at data portions that exhibit higher error rates under elevated temperatures, while other data portions use the standard first error correction code (ECC1). This localized quality approach optimizes processing time by avoiding uniform application of high-capacity ECC across all data
Data Source
AI summary
Systems, methods, and apparatus related to memory devices such as solid state drives. In one approach, data is received from a host system (e.g., data to be written to an SSD). The received data is encoded using a first error correction code to generate first parity data. A temperature at which memory cells of a storage device (e.g., the SSD) will store the received data is determined. In response to determining the temperature, a first portion of the received data is identified (e.g., data in memory storage that is error-prone at a predicted higher temperature that has been determined based on output from an artificial neural network using sensor(s) input). The identified first portion is encoded using a second error correction code to generate second parity data. The second error correction code has a higher error correction capability than the first error correction code. The encoded first portion, the first parity data, and the second parity data are stored in the memory cells of the storage device.