Solid State Drive ECC Controller Retry Table for Uncorrectable Errors
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Solution Overview
Problem
Conventional solid state drives experience a significant drop in data throughput and performance when encountering uncorrectable errors in read data, as they cannot correct errors in real time, requiring a standby mode for error correction.
Innovation Solution
The implementation of a retry table in the ECC controller that defines the usage order of multiple ECC algorithms allows for real-time error correction by changing algorithms and control factors when uncorrectable errors occur, ensuring continuous data output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single ECC algorithm is used to verify read data, then the device complexity is low, but the reliability decreases when uncorrectable errors occur
Solution Approach 1:
The ECC controller dynamically switches between a first ECC algorithm and a second ECC algorithm based on whether the initial verification succeeds or fails. This dynamic adaptation allows the system to handle uncorrectable errors by trying alternative algorithms, improving reliability without permanently increasing device complexity
Solution Approach 2:
The system changes the algorithm parameter when the first ECC algorithm fails to correct errors. By switching to a different ECC algorithm with different correction capabilities, the system can resolve uncorrectable errors while maintaining a relatively simple controller structure that only needs to manage algorithm selection
2Productivity
If error correction is performed in standby mode only, then the device complexity is low, but the productivity decreases due to data throughput drop
Solution Approach 1:
The system performs preliminary error correction attempts using the first ECC algorithm immediately when read data is retrieved, before entering standby mode. This preliminary action allows most errors to be corrected in real-time, maintaining data throughput without requiring extended standby periods
Solution Approach 2:
The error correction process continues continuously through multiple algorithm attempts rather than pausing for standby mode. The system maintains continuous useful action by sequentially trying different ECC algorithms until errors are corrected, ensuring uninterrupted data flow and high productivity
3Reliability
If multiple ECC algorithms are implemented with retry table, then the reliability improves for error correction, but the device complexity increases
Solution Approach 1:
The error correction function is segmented into multiple independent ECC algorithms, each handling different types of errors. The retry table segments the correction process into discrete steps, allowing the system to try different algorithms systematically without requiring a completely complex integrated solution
Solution Approach 2:
The retry table acts as an intermediary that manages the selection and sequencing of different ECC algorithms. This intermediary component simplifies the overall system architecture by providing a structured approach to algorithm selection, reducing the complexity of directly managing multiple error correction methods
Data Source
AI summary
A solid state drive includes: a processing circuit for receiving a read command from the host; a flash memory connected to the processing circuit; and a buffer connected to the processing circuit. An error check and correction method includes following steps. Firstly, a read data retrieved from the flash memory is verified according to a predetermined algorithm when receiving the read command. Then, the read data is outputted by the processing circuit when the read data has no uncorrectable error. Furthermore, a retry action is performed according to a retry table when an error of the read data is uncorrectable. A usage order of a plurality of algorithms is defined in the retry table.