SSD Exception Handling via Domain Synchronization

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Solution Overview

Problem

The increasing complexity of Solid State Drive (SSD) controllers due to asynchronous and independently operating domains with different clock frequencies and voltage levels poses challenges in synchronizing and efficiently handling exceptions, such as errors or hardware failures, which can disrupt SSD operations.

Innovation Solution

The implementation of an exception handling system that classifies exceptions, groups them into action clusters, and uses an exception scheduler to synchronize processing across multiple domains, allowing actions to be executed in series or parallel, with sync points ensuring that each domain completes its tasks before proceeding, thereby ensuring robust exception handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processor cores are used to handle different tasks in SSD controller, then productivity is improved, but device complexity increases due to asynchronous domains with different clock frequencies and operating voltages

Engineering Contradiction:
Improveexception handling speedVSAvoidsynchronization complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the SSD controller into multiple independent processor cores (first processor core, second processor core, third processor core) operating in separate asynchronous domains. Each core handles specific tasks independently, with the first core managing normal operations, the second core handling exceptions, and the third core managing power management. This segmentation allows parallel processing to improve productivity while containing synchronization complexity through domain-specific isolation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an exception scheduler as an intermediary component that coordinates between different processor cores. The exception scheduler receives exception notifications from various domains, determines the appropriate core to handle the exception, and manages the exception handling process. This intermediary abstracts the complexity of coordinating multiple asynchronous domains, enabling reliable exception handling across distributed cores.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If exception handling requires rapid real-time response, then reliability is improved, but device complexity increases due to synchronization requirements across multiple domains

Engineering Contradiction:
Improveexception handling reliabilityVSAvoidsynchronization complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by having processor cores asynchronously notify the exception scheduler when exceptions occur, rather than requiring synchronous coordination. The exception scheduler proactively receives notifications and determines handling actions in advance. This allows rapid exception response while avoiding the complexity of synchronous coordination across domains with different clock frequencies.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs dynamic exception handling where the exception scheduler can route exceptions to different processor cores based on current system state and exception type. The handling mechanism adapts dynamically to the asynchronous nature of the domains, using event-driven architecture and conditional routing to manage synchronization complexity while maintaining reliable real-time response.

Inventive Principle:
Principle #15Dynamics

3Ease of operation

If processor cores operate independently at different clock frequencies, then ease of operation is improved through domain independence, but device complexity increases due to lack of synchronization

Engineering Contradiction:
Improvedomain independenceVSAvoidsynchronization complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments the controller into independently operating domains (first domain, second domain, third domain) each with its own processor core and clock frequency. This segmentation enables domain independence and ease of operation for each core, while the exception scheduler manages the complexity of coordination between domains through asynchronous notification mechanisms.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback mechanisms where processor cores asynchronously notify the exception scheduler of exception conditions. This feedback system allows each domain to operate independently at its own clock frequency while maintaining coordination through event-driven communication. The exception scheduler processes these feedback signals and coordinates appropriate responses across domains, managing synchronization complexity through asynchronous event handling.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11960730B2Distributed exception handling in solid state drives
Publication Date: 2024.04.16 SANDISK TECHNOLOGIES LLC
  • US11960730B2 patent drawing
  • US11960730B2 patent drawing
  • US11960730B2 patent drawing

AI summary

Systems and methods described herein synchronize events between various components of storage device during the processing of an exception (i.e., an internal error). The storage device can have a plurality of processors which may each coordinate operations on various domains of storage device processing tasks. An exception occurring in one domain may require input and coordination from other domains within the storage device. Each exception may have a list of predetermined steps needed for completion which are coordinated via a series of sync points placed between exception action clusters which perform a series of specific operations until data or processing from another domain is needed to continue processing. The sync points can be utilized to halt processing in one domain until the other domains are in sync and complete one or more exception action operations. In this way, a streamlined and predictable synchronization between domains may occur during an exception.