SSD Hardware Encryption Engine Offloads Host CPU
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Solution Overview
Problem
Existing systems burden server CPUs and local memory with slow data throughput and high latency due to the need for encryption and decryption processes, especially when using general-purpose CPUs for encryption instructions.
Innovation Solution
Incorporating a dedicated encryption circuit with a hardware encryption engine in a storage device, such as a solid-state drive (SSD), to perform cryptographic operations like encryption and decryption directly on the SSD, reducing the host CPU's workload and enhancing data transfer efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data encryption and decryption are performed using general-purpose server CPU, then data security is maintained, but data throughput decreases and latency increases
Solution Approach 1:
The patent divides the encryption/decryption function into a separate dedicated hardware module within the storage device, independent from the server CPU. This segmentation allows the server CPU to focus on data processing while the dedicated module handles cryptographic operations, resolving the contradiction between security (maintained by dedicated encryption) and throughput (improved by parallel processing)
Solution Approach 2:
The patent introduces a dedicated encryption module as an intermediary between the storage media and the server CPU. This intermediary performs cryptographic operations locally, eliminating the need for the server CPU to process encrypted data sequentially, thus maintaining security while improving overall system throughput
2Reliability
If data encryption and decryption are performed using general-purpose server CPU, then data security is maintained, but processing latency increases
Solution Approach 1:
By segmenting the encryption function into a dedicated hardware module, the patent enables parallel processing of encryption/decryption operations independent of the server CPU's processing schedule, thereby reducing latency while maintaining security through specialized cryptographic hardware
Solution Approach 2:
The patent replaces the software-based encryption mechanism (CPU executing encryption instructions) with a hardware-based encryption engine. This substitution eliminates the overhead of instruction fetching, decoding, and execution, significantly reducing processing latency while maintaining cryptographic security
3Adaptability or versatility
If encryption instructions are stored in memory and executed by server CPU, then flexibility is maintained, but processing speed decreases
Solution Approach 1:
The patent substitutes the software execution model (CPU fetching and executing encryption instructions from memory) with a dedicated hardware encryption engine. This hardware engine has encryption logic hardwired into its circuitry, providing fixed high-speed performance while maintaining adaptability through configurable cryptographic algorithms and key management
Data Source
AI summary
A storage device. In some embodiments, the storage device includes a storage interface, configured to be connected to a host computer, a processing circuit, and persistent storage media. The processing circuit may be configured to: read first data from the persistent storage media in response to a read command received through the storage interface; transmit second data through the storage interface, the second data being based on the first data; receive a write command, with third data, through the storage interface; write fourth data, based on the third data, to the persistent storage media; and perform a cryptographic operation on the first data or on the third data.