SSD Controller Host Memory Buffer Power Saving

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Solution Overview

Problem

Solid state drive (SSD) devices face challenges in reducing power consumption during power-saving modes due to the need to maintain volatile memory for quick transitions, which increases entrance and resume latency and can shorten the lifespan of non-volatile memory.

Innovation Solution

An SSD controller transfers dynamic information from volatile memory to a host memory buffer during power-saving mode and back when resuming, allowing some volatile memory to be powered down, thereby reducing power consumption and minimizing wear on non-volatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory is maintained during power-saving mode to enable quick transitions, then transition speed is improved, but power consumption increases

Engineering Contradiction:

Improvetransition speedVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The volatile memory is divided into multiple banks, allowing selective shutdown of individual banks during power-saving mode while keeping others active for quick transitions. This segmentation enables the system to maintain only the minimum necessary memory capacity active, reducing overall power consumption while preserving transition capability.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different banks of volatile memory are assigned different operational states (active, retention, or shutdown) based on their specific function and necessity for quick transitions. This local quality approach ensures that only essential memory portions remain active, optimizing the balance between transition speed and power consumption.

Inventive Principle:

Principle #3Local quality

2Use of energy by moving object

If more volatile memory banks are shut down to reduce power consumption, then power consumption is reduced, but entrance and resume latency increases

Engineering Contradiction:

Improvepower consumptionVSAvoidentrance and resume latency

Core Design Contradiction:

Use of energy by moving objectVSLoss of time

Solution Approach 1:

Essential data and state information are pre-loaded into the volatile memory banks that remain active before entering power-saving mode. This preliminary action ensures that when the SSD transitions back to active mode, the necessary information is already in place, minimizing resume latency despite shutting down more memory banks.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A host memory buffer is introduced as an intermediary to store data that would otherwise require frequent transfers to non-volatile memory. This intermediary buffer reduces the need for volatile memory to maintain all data, allowing more banks to be shut down while maintaining system performance through the buffer's mediation.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Use of energy by moving object

If information is moved to non-volatile memory to enable volatile memory shutdown, then power consumption is reduced, but non-volatile memory wear increases

Engineering Contradiction:

Improvepower consumptionVSAvoidnon-volatile memory lifespan

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The host memory buffer serves as an intermediary storage layer between the SSD and the host system. By utilizing this buffer for data that would otherwise require frequent non-volatile memory access, the system reduces the frequency of write operations to non-volatile memory, thereby extending its lifespan while still enabling volatile memory shutdown for power savings.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

Instead of moving all information to non-volatile memory, the system selectively moves only the essential minimum required for operation. This partial action approach allows volatile memory banks to be shut down for power savings while limiting non-volatile memory write operations to only what is absolutely necessary, preserving its lifespan.

Inventive Principle:

Principle #16Partial or excessive action

4Speed

If volatile memory banks are put into retention mode instead of shutdown, then transition capability is maintained, but power consumption is not sufficiently reduced

Engineering Contradiction:

Improvetransition capabilityVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The volatile memory is segmented into banks that can be independently controlled. By shutting down specific banks that do not require immediate transition capability while keeping only essential banks in retention or active state, the system achieves sufficient transition capability with lower overall power consumption than if all banks remained in retention mode.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS12019881B1Reduced power consumption by SSD using host memory buffer

Publication Date: 2024.06.25 MARVELL ASIA PTE LTD

AI summary

A controller of a solid state drive (SSD) device, in response to determining that the SSD device is to transition to a power saving mode: transfers information from at least some of a volatile memory of an SSD device controller of the SSD device to a host memory of a host computer via a communication interface; and transitions the at least some of the volatile memory to an OFF state to reduce power consumption of the SSD device. In response to determining that the SSD device is to transition from the power saving mode to a normal operating mode, the controller also: transitions the at least some of the volatile memory to an ON state in which the at least some of the volatile memory is configured to retain data; and transfers the information from the host memory to the volatile memory of the SSD device controller via the communication interface.