SSD Map Data Pre-fetching for Sequential Read Optimization

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Solution Overview

Problem

NAND flash memory devices require frequent retrieval of mapping data, which negatively impacts bandwidth for transferring user data due to the need for device driver software or a controller chip to manage logical-to-physical mappings and track block failures, leading to inefficiencies in data transfer.

Innovation Solution

A solid-state drive (SSD) with a media controller that determines logical addresses and transfer sizes for read requests, adjusts map data pre-fetch sizes based on sequential read requests, and transfers adjusted map data to a cache to optimize data retrieval from solid-state media, reducing redundant access and improving data throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If mapping data is retrieved frequently from NAND flash memory, then logical-to-physical mapping can be maintained, but bandwidth for transferring user data is reduced

Engineering Contradiction:
Improvemapping data retrievalVSAvoiduser data transfer bandwidth
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system pre-fetches mapping data into a dedicated map cache before it is needed for user data transfers. By anticipating and preparing the mapping data in advance, the system eliminates the need to retrieve mapping data during critical user data transfer operations, thus maintaining both reliable mapping functionality and high user data bandwidth.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A dedicated map cache is introduced as an intermediary storage layer between the NAND flash memory and the host. This cache stores mapping data locally, allowing the system to access mapping information without repeatedly accessing the NAND flash memory channel, thereby preserving channel bandwidth for user data transfers while maintaining mapping reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If mapping data is stored in NAND memory, then logical-to-physical mappings can be tracked, but frequent access to map data impacts data transfer efficiency

Engineering Contradiction:
Improvemapping trackingVSAvoiddata transfer efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The storage system is segmented into two distinct functional components: a dedicated map cache for storing and accessing mapping data, and the NAND flash memory for storing user data. This segmentation allows mapping data to be accessed independently from user data transfers, eliminating the conflict between mapping tracking and data transfer efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system creates a copy of the mapping data structure in the dedicated map cache. Instead of repeatedly reading mapping data from NAND flash memory during data transfers, the system uses the cached copy of the mapping data, thereby maintaining mapping tracking capability while improving data transfer efficiency by avoiding redundant NAND accesses.

Inventive Principle:
Principle #26Copying

3Ease of manufacture

If sequential read requests are handled with fixed map data pre-fetch size, then implementation is simple, but data transfer efficiency is suboptimal

Engineering Contradiction:
Improveimplementation simplicityVSAvoidsequential read efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The map data pre-fetch size is made dynamic rather than fixed. The system adjusts the pre-fetch size based on the characteristics of incoming read requests - using larger pre-fetch sizes for sequential reads to improve efficiency, and smaller sizes for random reads to minimize unnecessary data transfer. This dynamic adaptation optimizes sequential read performance while maintaining reasonable implementation complexity through request analysis.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9235346B2Dynamic map pre-fetching for improved sequential reads of a solid-state media
Publication Date: 2016.01.12 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9235346B2 patent drawing
  • US9235346B2 patent drawing
  • US9235346B2 patent drawing

AI summary

Described embodiments provide a solid-state drive (SSD) including a media controller and a solid-state media. A control processor of the media controller determines a logical address, a transfer size, and map data based on the logical address and transfer size, associated with a read request received from a host device. Based on the logical address and a sequential zone defined based on one or more previous read requests, the control processor determines whether the received read request is a sequential read. A map data pre-fetch size is adjusted based on the transfer size of the received read request and whether the received read request is a sequential read. A corresponding portion of the map data is transferred from the solid-state media to a map cache coupled to the control processor, the transferred portion having a size equal to the adjusted map data pre-fetch size.