SSD Memory Controller Dual-Mode Access for Byte-Level Data

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Solution Overview

Problem

Traditional storage devices like Hard Disk Drives (HDDs) and Solid State Drives (SSDs) are typically accessed at a block level, which can limit the efficiency and flexibility of data access, especially when operating systems and applications are designed to work with block-based interfaces, whereas volatile memory like DRAM is accessed at a byte level, offering faster access times.

Innovation Solution

Implementing a memory controller in SSDs that can switch between block storage mode and memory mode, allowing access to non-volatile memory using either block addressing schemes like LBA or byte addressing schemes, enabling faster and more granular data access without altering existing host system interfaces or software.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If block-based access is used for non-volatile memory, then compatibility with existing operating systems and applications is maintained, but data access speed and granularity are limited

Engineering Contradiction:

Improvecompatibility with existing operating systemsVSAvoiddata access speed

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The memory controller dynamically switches between block storage mode and memory mode based on the type of access request received. When a block storage command is received, it translates to block addresses; when a memory command is received, it translates to linear addresses. This dynamic adaptation allows the same physical memory to serve both compatibility requirements and performance requirements.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent implements a universal memory interface that can handle both traditional block storage operations and modern memory-style operations. The memory controller acts as a universal translator, accepting commands from either mode and routing them appropriately to the non-volatile memory, thus making the storage device compatible with both legacy and modern access patterns.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Ease of operation

If block addressing scheme is used, then interface simplicity is maintained, but access granularity and flexibility are reduced

Engineering Contradiction:

Improveinterface simplicityVSAvoidaccess granularity

Core Design Contradiction:

Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent segments the address space into two distinct modes: block storage addressing (with block addresses) and memory addressing (with linear addresses). The memory controller segments the command processing into separate translation paths, allowing each mode to operate with its own simplified addressing scheme while providing access to the same underlying memory through different granularity levels.

Inventive Principle:

Principle #1Segmentation

3Speed

If dual-mode access is implemented, then data access flexibility and speed are improved, but device complexity increases

Engineering Contradiction:

Improvedata access speedVSAvoidmemory controller complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The memory controller serves as an intermediary layer between the host system and the non-volatile memory. It mediates between different addressing schemes by maintaining address translations between block addresses and linear addresses. This intermediary role allows the complex dual-mode functionality to be isolated within the controller, keeping the rest of the system simple while enabling flexible access patterns.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Productivity

If byte-level access is enabled, then data manipulation efficiency is improved, but power consumption increases

Engineering Contradiction:

Improvedata manipulation efficiencyVSAvoidpower consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The system allows byte-level access when needed for data manipulation tasks, but doesn't require continuous byte-level monitoring or access. The memory controller can switch to block-level operations when full byte-granularity is not required, reducing power consumption while maintaining the capability for efficient data manipulation when necessary. This partial application of byte-level access optimizes the trade-off between productivity and energy use.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS10318185B2Method and apparatus to provide both storage mode and memory mode access to non-volatile memory within a solid state drive

Publication Date: 2019.06.11 SK HYNIX NAND PRODUCT SOLUTIONS CORP

AI summary

An apparatus is described. The apparatus can include non-volatile memory, an embedded processor, and a memory controller. The memory controller can access data from the byte addressable non-volatile memory using at least one of: a first addressing scheme or a second addressing scheme. The memory controller can provide the data to a host system over a first interface when the data is accessed using the first addressing scheme. The memory controller can provide the data to the embedded processor over a second interface when the data is accessed using the second addressing scheme.