SSD Memory Space Allocation for Parallel Data Access Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid state drives (SSDs) in large scale applications experience increased latency and reduced quality of service (QoS) due to parallel data requests from multiple data requestors.
Innovation Solution
A system with a controller that assigns dedicated memory spaces to data requestors, enabling direct access using physical addresses, managing a queue for parallel data access with reduced computational overhead and complexity, and performing internal memory management operations like garbage collection and wear leveling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple data requestors access data in parallel through traditional address translation, then data can be retrieved from memory device, but latency increases and quality of service deteriorates
Solution Approach 1:
The memory address space is segmented into dedicated regions assigned to different data requestors. Each requestor receives a specific memory space with a corresponding physical address, allowing parallel access without interference. This segmentation eliminates the need for sequential address translation and enables simultaneous data retrieval operations.
Solution Approach 2:
The controller acts as an intermediary that manages the queue of data access requests and coordinates direct access to dedicated memory spaces. By pre-assigning physical addresses to specific memory spaces for each requestor, the controller enables direct access without requiring real-time address translation during parallel operations.
2Reliability
If traditional address translation is used for data access, then data can be located and retrieved, but computational overhead and complexity increase
Solution Approach 1:
The controller performs preliminary action by pre-assigning dedicated memory spaces with corresponding physical addresses to each data requestor before data access operations begin. This pre-configuration stores the mapping information in advance, eliminating the need for complex real-time address translation during data retrieval operations.
3Productivity
If parallel data requests are handled without dedicated memory spaces, then multiple data requestors can access data simultaneously, but memory wear becomes uneven
Solution Approach 1:
Dedicated memory spaces are assigned to specific data requestors based on their access patterns and requirements. This local quality approach ensures that each requestor accesses their assigned memory region, distributing write operations across different memory locations and preventing concentrated wear on specific blocks.
Data Source
AI summary
A data storage system may include a memory device and a controller. The controller may include at least one processor and a memory. The memory may include instructions stored thereon, that when executed by at least one processor, cause the at least one processor to: assign memory spaces of the memory device respectively to corresponding ones of a plurality of data requestors, said memory spaces having corresponding physical addresses; receive data access requests from the plurality of data requestors; generate a queue of the data access requests for accessing the memory device; and responsive to the data access requests, enable the plurality of data requestors to directly access corresponding ones of the respective memory spaces.