SSD NAND Read Throttling to Prevent Internal Memory Overflow

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Solution Overview

Problem

SSDs experience increased read latency and power consumption due to the overflow of read data from internal memory into slower external memory, which is exacerbated by varying host traffic profiles and limited internal memory capacity.

Innovation Solution

Implement a throttling mechanism that adjusts the read-out rate from NAND memory based on the available capacity of internal memory, preventing data overflow into external memory by dynamically reducing the read-out rate when internal memory approaches a predetermined threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the read-out rate from NAND memory is increased to improve data transfer speed, then productivity is improved, but the internal memory capacity is exceeded causing data overflow into external memory, which increases read latency and power consumption

Engineering Contradiction:
Improvedata transfer rateVSAvoidread latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the read-out rate adjustable rather than fixed. The controller dynamically modifies the read-out rate from NAND memory based on the fill level of internal memory, allowing the system to optimize between high-speed transfer and preventing overflow conditions that would degrade performance

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by continuously monitoring the fill level of internal memory and using this information to adjust the read-out rate. When internal memory approaches capacity, the controller reduces the read-out rate to prevent overflow into slower external memory, creating a closed-loop control system that adapts to real-time conditions

Inventive Principle:
Principle #23Feedback

2Productivity

If the read-out rate from NAND memory is increased to improve data transfer speed, then productivity is improved, but power consumption increases due to data overflow into external memory

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The controller dynamically adjusts the read-out rate based on internal memory fill level, enabling high-speed transfer when capacity is available and reducing rate when approaching limits, thereby avoiding the power-intensive operation of transferring data to external memory

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

By monitoring internal memory fill level and feedback-driven adjustment of read-out rate, the system prevents overflow conditions that would trigger power-consuming transfers to external memory, optimizing energy efficiency while maintaining productivity

Inventive Principle:
Principle #23Feedback

3Loss of time

If internal memory capacity is increased to prevent data overflow, then read latency is reduced, but device complexity and cost increase

Engineering Contradiction:
Improveread latencyVSAvoidmemory capacity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

Instead of changing the physical capacity parameter of internal memory, the patent changes the operational parameter of read-out rate to achieve the same goal of preventing overflow and maintaining low latency with existing memory resources

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies a throttled or reduced read-out rate when internal memory fill level approaches capacity, using partial action (reduced rate) rather than requiring excessive memory capacity to handle peak data flows

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12487744B2Throttling NAND read-outs for improved host read performance
Publication Date: 2025.12.02 KIOXIA CORP
  • US12487744B2 patent drawing
  • US12487744B2 patent drawing
  • US12487744B2 patent drawing

AI summary

A method performed by a controller of a solid-state drive (SSD) having an integrated circuit comprising the controller. The method comprises receiving from a host a request for read data stored in a non-volatile semiconductor storage device of the SSD. The method also comprises determining if a capacity of internal memory of the integrated circuit is less than a predetermined fraction of its total capacity. Then the method comprises throttling a read-out rate used by the controller to retrieve data from the non-volatile semiconductor storage device if the capacity of internal memory of the integrated circuit is less than a predetermined fraction of its total capacity. The method then comprises retrieving the read data for storage in the internal memory using the throttled read-out rate.