SSD Initialization via PMIC-Stored HMB Pointers
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Solution Overview
Problem
Data storage devices, such as solid state drives (SSDs), face challenges in reducing initialization time when transitioning from a low power state back to an active state, as the boot process is delayed due to the need for host memory buffer (HMB) access and verification, which is inaccessible until the host device provides the address during NVMe initialization.
Innovation Solution
Incorporating an always-on (AON) application-specific integrated circuit (ASIC) and a power management integrated circuit (PMIC) to generate and store security data associated with context data in both the memory device and HMB, with the PMIC storing the location and security data, allowing for pre-emptive retrieval and verification of context data upon wake-up, enabling faster initialization by booting from the HMB upon successful verification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the data storage device stores context data in both the memory device and HMB, then the initialization time is reduced by enabling direct HMB access, but the device complexity increases due to the need for dual storage and verification mechanisms
Solution Approach 1:
The patent applies preliminary action by pre-storing context data in the HMB before the data storage device needs to initialize. The host system prepares the HMB with context data and stores the HMB pointer in the PMIC in advance, so that when the device wakes from low power state, it can immediately access the pre-prepared context data without waiting for host initialization, thereby reducing initialization time while managing complexity through targeted pre-preparation
Solution Approach 2:
The patent introduces the PMIC as an intermediary component that bridges the host system and the data storage device. The PMIC stores the HMB pointer and facilitates the transfer of context data from the host's HMB to the device's memory device. This intermediary manages the complexity by centralizing the coordination of dual storage operations and verification processes, allowing the system to achieve fast initialization without requiring complex direct peer-to-peer communication between host and device
2Speed
If the device boots from HMB using pre-stored address, then the initialization speed is improved, but the reliability may be compromised due to potential data corruption or security issues
Solution Approach 1:
The patent implements feedback through a verification mechanism where context data retrieved from the HMB is compared against security data (such as hash values or checksums) that are also stored in the PMIC. After the device accesses the HMB using the pre-stored pointer, it verifies the integrity and security of the retrieved context data by comparing it with the stored security data. This feedback loop ensures that even though the device is booting from external HMB storage, the reliability is maintained through automated verification, allowing fast initialization without compromising data integrity
Solution Approach 2:
The patent applies beforehand cushioning by pre-storing security data (such as cryptographic hashes or verification codes) along with the context data in the PMIC before the device enters low power state. This preparatory measure creates a safety cushion that protects against potential data corruption or security breaches when accessing HMB. The pre-stored security data serves as a protective layer that can immediately verify the validity of retrieved context data without requiring additional external verification steps, thus maintaining reliability while enabling fast boot
Data Source
AI summary
A data storage device includes a memory device, an always on (AON) application specific integrated circuit (ASIC), and a controller coupled to the memory device and the AON ASIC. When the data storage device enters a low power state, the controller generates and stores security data associated with context data in a power management integrated circuit (PMIC). The context data is stored in both the memory device and a host memory buffer (HMB). A location of the context data in the HMB is stored in the PMIC with the security data. When the data storage device exits the low power state, the address stored in the PMIC is utilized to retrieve the context data from the HMB. The retrieved context data is verified against the security data by the controller.