SSD PCB Port and Via Layout for Shorter Host Signal Paths
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Solution Overview
Problem
Existing storage devices face increased signal loss and decreased transfer rates due to longer channels between the memory controller and host device, limited by the conventional design and non-uniform distances between the memory controller and memory devices.
Innovation Solution
A novel design that includes a substrate with a conductive via and a port configuration, allowing the memory controller to be mounted on the top surface and connected directly to the host device via a conductive via on the bottom surface, minimizing channel length and ensuring uniform distances between the memory controller and memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the channel length between memory controller and host device is increased, then more space is available for component layout, but signal loss increases and transfer rate decreases
Solution Approach 1:
The patent utilizes the vertical dimension by forming the conductive via through the substrate thickness, allowing the memory controller to be mounted on the top surface while connecting to the host device interface on the bottom surface. This three-dimensional routing approach resolves the contradiction by providing adequate component layout space on the top surface while maintaining a short effective signal path through the via, thereby avoiding signal loss associated with longer horizontal channels.
2Adaptability or versatility
If the channel length between memory controller and host device is increased, then component placement flexibility improves, but transfer rate decreases
Solution Approach 1:
By transitioning from a planar two-dimensional layout to a three-dimensional structure with vertical vias, the patent achieves both component placement flexibility on the top surface and high transfer rates through the short vertical connection path. The via structure allows memory devices to be positioned anywhere on the top surface while maintaining optimal signal transmission speed to the host device interface on the bottom surface.
3Adaptability or versatility
If non-uniform distances between memory controller and memory devices are used, then layout flexibility improves, but signal characteristics become non-uniform
Solution Approach 1:
The patent segments the signal path into two distinct parts: uniform short vertical connections from each memory device through individual vias to the substrate, and then horizontal routing on the substrate layer. This segmentation allows each memory device to have its own optimized via connection while the substrate provides a standardized routing layer, achieving both layout flexibility and uniform signal characteristics.
Solution Approach 2:
The patent applies local quality by providing individual via connections for each memory device positioned at optimal locations on the top surface, while the substrate provides a standardized uniform routing structure. This allows each memory device to have customized positioning (local flexibility) while maintaining consistent signal transmission characteristics through the standardized via and substrate routing structure (global uniformity).
Data Source
AI summary
Provided herein may be a storage device and a printed circuit board for a solid state drive. The storage device may include a substrate including a conductive via, a plurality of memory devices mounted on a top surface of the substrate, a memory controller mounted on the top surface and electrically connected to the conductive via, and a port formed on a bottom surface of the substrate and electrically connected to the conductive via and a host device.