SSD Power Island Segmentation for Low Idle Power

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Solution Overview

Problem

Conventional solid-state storage devices face challenges in reducing idle power consumption while maintaining low resume latency when exiting reduced power states, as existing methods often require power to be maintained for context information storage in volatile memory, which increases power usage.

Innovation Solution

The solution involves arranging a storage controller and NAND flash packages in separate power islands, where context information is stored in a page buffer of NAND flash memory on one island, allowing the NAND flash memory to enter standby mode, and the storage controller to enter a low power mode, with power removed from unneeded components, enabling efficient power reduction while maintaining quick resume capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If power is removed from all unneeded components when SSD enters reduced power state, then idle power levels are reduced, but resume latency increases due to loss of context information

Engineering Contradiction:

Improveidle power levelsVSAvoidresume latency

Core Design Contradiction:

Use of energy by stationary objectVSLoss of time

Solution Approach 1:

The patent divides the SSD into separate power islands - one containing the storage controller with volatile memory and another containing the NAND flash memory. This segmentation allows independent power management of each island, enabling the NAND flash to be powered down while the storage controller remains powered to maintain context information, thus resolving the contradiction between reducing idle power and maintaining low resume latency.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a new spatial dimension by creating physically separate power islands within the SSD architecture. By distributing components across multiple power islands with distinct power sources, the system gains the ability to selectively power individual islands, thereby achieving both low idle power consumption and fast resume performance simultaneously.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Loss of time

If context information is stored in volatile memory within storage controller, then resume latency is reduced, but power consumption increases when in reduced power state

Engineering Contradiction:

Improveresume latencyVSAvoidpower consumption in reduced power state

Core Design Contradiction:

Loss of timeVSUse of energy by stationary object

Solution Approach 1:

The patent segments the SSD into power islands, placing the storage controller with its volatile memory in one island and the NAND flash memory in another. This allows the storage controller to remain powered (maintaining context information for fast resume) while the NAND flash island is powered down (reducing idle power consumption), thus resolving the contradiction between fast resume and low power consumption.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent extracts the context information storage function from the main SSD power domain by placing it in a separate power island that remains powered during reduced power states. This extraction allows the main NAND flash memory to be powered down while the critical context information remains accessible in the powered storage controller, achieving both low power and fast resume.

Inventive Principle:

Principle #2Taking out (Extraction)

3Use of energy by stationary object

If NAND flash memory enters standby mode, then power consumption is reduced, but access speed decreases

Engineering Contradiction:

Improvepower consumptionVSAvoidaccess speed

Core Design Contradiction:

Use of energy by stationary objectVSSpeed

Solution Approach 1:

By segmenting the SSD into separate power islands, the patent enables the NAND flash memory to enter standby mode (reducing power consumption) while the storage controller remains fully operational (maintaining access speed for metadata and context information). The separation allows the system to achieve both low power consumption and maintained access performance.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS9141299B2Method for reducing power consumption in solid-state storage device

Publication Date: 2015.09.22 TAHOE RES LTD

AI summary

Apparatus and methods of reducing power consumption in solid-state storage devices such as solid-state disks (SSDs) that can reduce idle power levels in an SSD, while maintaining low resume latency upon exiting a reduced power state. By arranging a storage controller and at least one NAND flash package of the SSD in separate power islands, storing context information for the SSD in at least one page buffer of NAND flash memory within the NAND flash package on one power island upon entering the reduced power state, and, once the context information is stored in the page buffer, allowing the NAND flash memory to enter a standby mode, placing the storage controller on the other power island in a predefined low power mode, and removing power from any unneeded components on the same power island as the storage controller, a scalable approach to reducing idle power levels in the SSD can be achieved.